AEAT-86AD
14/12 Bit Multi-turn Encoder Module with Built-in Controller
Data Sheet
Description
The AEAT-86AD provides all functions as an optoelec-
tronic mechanical unit in order to implement, with single
turn absolute encoder, an absolute multi-turn encoder
with a combined capacity of up to 30 bits at extended
temperature.
The unit consists of an LED circuit board, a phototransis-
tor (PT) circuit board, and gear train arranged in between
the PCBs.
The built-in controller combined positional information
from single turn absolute encoder and multiturn absolute
encoder. It provides control inputs and signal outputs to
application end. The integrated RS-422 differential line
driver output and line receiver are for noise immunity in
transmission line.
Features
•
16384 (14bits) and 4096 (12bits) revolution count ver-
sions
•
Optical, absolute multi-turn assembly with max. Ø55
mm and typical height 13.3 mm.
•
Operating temperatures of -40°C to +125°C
•
Mechanical coupling by means of gear wheels with
module of 0.3
•
Operating speeds up to 12,000 rpm
•
A 2x4-pole pin strip for power supply and signal
•
Integrated RS422 line driver and receiver
Applications
•
Major component of Multi-turn housed encoder
•
Cost effective solution for direct integration into OEM
systems
•
Revolution detection
Specifications
The multi-turn unit is available in the following versions:
•
12-bit solid shaft with
Binary
output code
•
14-bit solid shaft with
Binary
output code
•
12-bit solid shaft with
Gray
output code
•
14-bit solid shaft with
Gray
output code
Benefits
•
No battery or capacitor required for number of revo-
lution counting during power failure
•
Immediate position detection on power up
Package Dimensions
Notes:
1. 3rd angle Projection
2. Dimensions are in millimeters
3. General tolerance: ±0.05, unless specified otherwise
Figure 1. Package dimensions
1
S21
2
3
5
S1
S22
S2
1, S20 - A0N
2, S17 - A0P
3, S18 - A09N
4, S15 - A09P
5, S5 - STCAL
M1 - GND
M2 - DATA -
M3 - DATA+
M4 - VCC
M5 - MSBINV
M6 - STROBE
M7 - SRCLK-
M8 - SRCLK+
Figure 2. Pin Configuration
Block Diagram and Detailed Description
Figure 3. Block Diagram
GENERAL
AEAT-86AD Multiturn Encoder Module is integrated with
a controller. The controller provides data synchronization
between Single Turn Absolute Encoder Module (i.e. AEAS-
7X00) and basic multiturn encoder module. Its combines
the serial data from both modules into combined (n
MT
+
n
ST
) bit resolution to application end.
The most significant bit (MSB) will always be sent first to
DATA+.
With integrated RS422 line driver and receiver, the differ-
ential data transmission is compatible with EIA standard
RS-422.
MSBINV
The MSB can be inverted (counting direction) by using
MSBINV.
STROBE
STROBE output pin can be used to determine whether
the data is locked or changing. It is high when date is
locked, but low when data is changing.
CONNECTION TO AEAS-7X00
Besides VDDA, VDD and GND of AEAS-7x00 need to be
connected to the Multiturn Encoder Module, data and
control i/o pins also need to be connected and soldered,
i.e. NSDOUT, N2SCL, N2NSL and N2DIN
NOTE:
n
MT
= resolution of multiturn module
n
ST
= resolution of single turn module
SRCLK+ and SRCLK -
SRCLK input pins are used to clocked out the serial out-
puts data through the DATA pins. Lapse time between
words or subsequent data frame must be 40
µs
or longer
for proper data transmission.
DATA+ and DATA -
DATA output pins provides positional information via
synchronous serial interface, which consists of
n
MT
bit
of serial data from multiturn module and
n
ST
bit of serial
data from single turn module.
3
Device Selection Guide
1
Part Number
AEAT-86AD-LASC0
AEAT-86AD-LASF0
AEAT-86AD-LCSC0
AEAT-86AD-LCSF0
Resolution
12 bit
14 bit
12 bit
14 bit
Operating Temperature (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Output Code
Binary
Binary
Gray
Gray
DC Supply Voltage (V)
+5.0 to +5.5
+5.0 to +5.5
+5.0 to +5.5
+5.0 to +5.5
Notes:
1. For other options of Multiturn Encoder Module, please refer to factory.
Absolute Maximum Ratings
1, 2
Parameter
DC Supply Voltage
Input Voltage
Output Voltage
Relative Air Humidity (Non-Condensing)
Encoder Shaft Speed
Storage Temperature
Symbol
V
CC
V
i
V
o
%RH
S
RPM
T
stg
Limits
-0.3 to + 6.0
-0.5 to +5.5
-0.5 to +V
CC
+0.5
85
Max 12000
-40 to 125
Units
V
V
V
%
rpm
°C
Notes:
1. Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is
not implied.
2. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3. This device meets the ESD ratings of the IEC61000-4-2 Level 1 (2KV).
Recommended Operating Condition
Parameter
DC Supply Voltage
Ambient Temperature
Hardware Clock
SSI Serial Clock
Encoder Shaft Speed
Symbol
V
CC
T
amb
f
HCLK
f
SRCLK
S
RPM
Values
+5.0 / +5.5
- 40 to +125
16
0.5 to 4
10000 or below
Units
V
°C
MHz
MHz
rpm
2
1
Notes
Notes:
1. Internal hardware clock that is built into the module
2. As unique coded gear-wheels techniques are implemented to generate unambiguous positional information, the interactions between these
high wear resistant gear wheels are subjected to mechanical wear and tear.
DC Characteristics
DC Characteristics over Recommended Operating Range, typical at 5 °C
Values
Parameter
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
V
CC
Supply Current
Symbol
I
OH
I
OL
V
IH
V
IL
I
CC
Condition
I
OH
= -8mA
I
OH
= 8mA
2
0.8
110
Min
2.4
0.4
Typ.
Max
Units
V
V
V
V
mA
Notes
1
1
2
2
Notes:
1. Only applicable for STROBE output.
2. Only applicable for MSBINV input.
3. RS-422 differential line driver for DATA output.
4. RS-422 differential line receiver for SRCLK input.
Timing Characteristics
Timing Characteristics over Recommended Operating Range, typical at 5 °C
Values
Parameter
Input Transition Rise/Fall Time
SRCLK Frequency
SRCLK Low-time
SRCLK High-time
Data Latch time
Lapse time between words
Symbol
t
R
/t
F
f
SRCLK
t
LSRCLK
t
HSRCLK
t
LATCH
t
LT
40
Condition
0.8V/2.0V
0.5
110
70
35
Min
Typ.
Max
10
4
Units
ns
MHz
ns
ns
µs
µs
3
3, 4
Notes
1
2
Notes:
1. Only applicable for MSBINV input.
2. SRCLK low-time = 0.50/f
SRCLK
; high-time = 0.50/f
SRCLK
.
3. Refer to Figure 4 for timing description.
4. Valid data on falling edges of SRCLK with STROBE is high.
SSI Frame Start
1
SRCLK +
3
n
MT
-1 n
MT
(n
MT
+1)
SSI Frame End
(n
MT
+ n
ST
)
(n
MT
+ n
ST
)-1
t
LT
t
LATCH
DATA +
MSB
MT
MSB-1
MT
LSB+1
MT
LSB
MT
MSB
ST
MSB-1
ST
LSB+1
ST
LSB
ST
n
MT
bit Multiturn
STROBE
Figure 4. Timing Characteristics of STROBE, SRCLK and DATA
n
ST
bit Single turn
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
