Clocks 1-4. Can be either full or half speed per Table 1.
Clock outputs 5-12. At full (1X) speed unless tristated per Table 1.
Mode Select pins. Selects tri-state or speed of outputs per Table 1.
Clocks 13-16. Can be either full or half speed per Table 1.
Type: I = Input, O = output, P = power supply connection
External Components
For proper operation, the device should have 0.1 µF and 0.01 µF capacitors connected between each VDD and
GND. If a crystal is used, it should be fundamental mode, parallel resonant. The oscillator has internal caps that
provide the proper load for a crystal with CL = 18 pF. For other values of CL , the formula 2*(CL -18) gives the value
of each capacitor that should be connected between X1 and ground and X2 and ground.
MDS 74CG117 D
2
Revision 041502
Integrated Circuit Systems • 525 Race Street. • San Jose • CA•95126 • (408)295-9800tel • www.icst.com
MK74CG117
16 Output Low Skew Clock Generator
Power Dissipation, Termination, and
Operating Frequency
As with all clock drivers, the power dissipated by the
MK74CG117 is affected by the external loading on the
output pins. This consists of the capacitance of the
load that is being driven, as well as the PC board trace
itself. Since this capacitance must be charged and
discharged with each cycle of the output clock, as the
frequency goes up. so does the power required.
Operating below the specified maximum output clock
frequency shown in Table 2 will keep the MK74CG117
power dissipation within acceptable limits.
External series termination resistors must be used in
series with each output. These resistors serve two
purposes: The first is to match the source impedance
to the line (PC board trace) that is being driven. This
will minimize reflections that cause non-linear
transitions on the output clock waveform. The output
impedance of the MK74CG117 is approximately 20
Ω
;
assuming a 50
Ω
line, then a 33
Ω
resistor should be
used at each output as shown in Figure 1.
Another reason for using the external resistors is to
reduce the power dissipation of the MK74CG117 at high
output clock speeds.
33
Ω
MK74CG117
Output
To load
Figure 1. External Termination
As speeds rise, the limiting factor in device operation
becomes the power generated by having a large number
of drivers in one package. Using the external termination
resistors reduces the power dissipated within the
device, allowing output frequencies up to 100 MHz.
M1 M0
Mode
0
0
All outputs tri-stated
0
1
12 at 1X, 4 at 0.5X
1
0
8 at 1X, 8 at 0.5X
1
1
16 outputs at 1X
At CLK (1X)
Z
CLK1-12
CLK5-12
CLK1-16
Note that the maximum operating frequency of the
MK74CG117 is determined by
the Mode selected from Table 1
and the Multiplier selected from
Table 2. For output frequencies
above 83.3 MHz, all 16 outputs
must be at the same frequency
(M1=M0=1).
When operating with a
At CLK/2 (0.5X)Max Output Freq
combination of 1X and 0.5X
Z
--
outputs, the output frequency
CLK13-16
83.3 MHz
cannot exceed 83.3 MHz.
CLK1-4, 13-16
None
83.3 MHz
100 MHz
Table 1. Tri-state and Mode Select
S2 S1 S0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Input
33 - 50
20 - 50
16 - 40
10 - 50
8 - 40
8 - 30
8 - 25
8 - 20
Multiplier CLK Out
0.5
1
1.25
2
2.5
3.333
4
5
16.5 - 25
20 - 50
20 - 50
20 - 100
20 - 100
26.7 - 100
32 - 100
40 - 100
Comments
Divider only; no PLL
PLL
PLL
PLL
PLL
PLL
PLL
PLL
Table 2. Multiplier Selections (Input and CLK Frequencies in MHz)
MDS 74CG117 D
3
Revision 041502
Integrated Circuit Systems • 525 Race Street. • San Jose • CA•95126 • (408)295-9800tel • www.icst.com
MK74CG117
16 Output Low Skew Clock Generator
Electrical Specifications
Parameter
Supply Voltage, VDD
Inputs
Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage Temperature
Operating Voltage, VDD
Input High Voltage, VIH, ICLK
Input Low Voltage, VIL, ICLK
Output High Voltage
Output High Voltage
Output Low Voltage, 3.3 V
Operating Supply Current, IDD, at 50 MHz
Short Circuit Current
Input Capacitance
Input Clock Frequency
Input Crystal Frequency
Output Clock Frequency (See Tables 1, 2)
Output Clock Rise Time
Output Clock Fall Time
Output Clock Rising Edge Skew
Output Clock Duty Cycle
Absolute Clock Period Jitter, except REF
Absolute Clock Period Jitter, REF
Maximum load per total of 16 outputs, with
33
Ω
termination. Note 4
Conditions
Referenced to GND
Referenced to GND
Referenced to GND
Max of 10 seconds
Minimum
Typical
Maximum
7
VDD+0.5
VDD+0.5
85
260
150
Units
V
V
V
C
C
C
V
V
V
V
V
V
mA
mA
pF
ABSOLUTE MAXIMUM RATINGS (Note 1)
0.5
0.5
-40
-65
3.14
VDD-1
VDD-0.4
2
0.4
63
±35
7
Refer to Table 2
Except when S2=S1=1
M1=M0=1
0.8 to 2.0V. Note 2
2.0 to 0.8V. Note 2
VDD = 3.3 V. Note 3
At VDD/2
DC CHARACTERISTICS (VDD = 3.3 V unless noted)
pin 2
pin 2
IOH=-8mA
IOH=-12mA
IOL=12mA
No Load
Each output
3.3
VDD/2
VDD/2
3.47
1
AC CHARACTERISTICS (VDD = 3.3 V unless noted)
8
1.5
1.5
150
50
±300
±500
20
100
2
2
250
55
MHz
MHz
ns
ns
ps
%
ps
ps
pF
pF
45
VDD = 3.3 V
VDD = 3.3V
100MHz output clock
83.3MHz output clock
240
320
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device.
Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device
reliability.
2. Based upon characterization data. Specified at VDD/2, with a 33
Ω
series termination resistor and 15 pF capacitor
to ground.
3. Between any two outputs with equal loading.
4. Additional load may be driven with the addition of an external heat sink. Contact ICS for details.
MDS 74CG117 D
4
Revision 041502
Integrated Circuit Systems • 525 Race Street. • San Jose • CA•95126 • (408)295-9800tel • www.icst.com
MK74CG117
16 Output Low Skew Clock Generator
Package Outline and Package Dimensions
48 pin SSOP
Inches
Symbol
Min
0.095
0.008
0.005
0.620
0.292
0.400
0.008
Max
0.110
0.013
0.010
0.630
0.299
0.410
0.016
A
b
c
D
E
H
e
Q
Millimeters
Min
2.413
0.203
0.127
15.748
7.417
10.160
0.203
Max
2.794
0.343
0.254
16.002
7.595
10.414
0.406
E
H
.025 BSC
0.635 BSC
D
Q
e
c
b
A
Ordering Information
Part/Order Number
MK74CG117F
MK74CG117FT
MK74CG117FI
MK74CG117FIT
Marking
MK74CG117F
MK74CG117F
MK74CG117FI
MK74CG117FI
Package
48 pin SSOP
Add Tape & Reel
48 pin SSOP
Add Tape & Reel
Temperature
0 to 70°C
0 to 70°C
-40 to 85°C
-40 to 85°C
While the information presented herein has been checked for both accuracy and reliability, ICS assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This
product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability,
or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical
instruments.
MDS 74CG117 D
5
Revision 041502
Integrated Circuit Systems • 525 Race Street. • San Jose • CA•95126 • (408)295-9800tel • www.icst.com
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