CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
TEST
CONDITIONS
PARAMETER
HC TYPES
High Level Input
Voltage
V
IH
-
-
2
4.5
6
Low Level Input
Voltage
V
IL
-
-
2
4.5
6
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or V
IL
-0.02
-0.02
-0.02
High Level Output
Voltage
TTL Loads
-
-4
-5.2
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or V
IL
0.02
0.02
0.02
Low Level Output
Voltage
TTL Loads
-
4
5.2
2
4.5
6
-
4.5
6
2
4.5
6
-
4.5
6
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
-
3.98
5.48
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
-
0.1
0.1
0.1
-
0.26
0.26
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
-
3.84
5.34
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
-
0.1
0.1
0.1
-
0.33
0.33
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
-
3.7
5.2
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
-
0.1
0.1
0.1
-
0.4
0.4
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
SYMBOL
V
I
(V)
I
O
(mA)
25
o
C
MIN
TYP
MAX
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
MIN
MAX
MIN
MAX
UNITS
V
CC
(V)
3
CD54HC251, CD74HC251, CD54HCT251, CD74HCT251
DC Electrical Specifications
(Continued)
TEST
CONDITIONS
PARAMETER
Input Leakage
Current
Quiescent Device
Current
Three-State Leakage
Current
HCT TYPES
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
Quiescent Device
Current
Three-State Leakage
Current
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
NOTE:
2. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
I
I
I
CC
-
V
CC
and
GND
V
CC
or
GND
V
IL
or V
IH
V
OL
V
IH
or V
IL
V
IH
V
IL
V
OH
-
-
V
IH
or V
IL
-
-
-0.02
4.5 to
5.5
4.5 to
5.5
4.5
2
-
4.4
-
-
-
-
0.8
-
2
-
4.4
-
0.8
-
2
-
4.4
-
0.8
-
V
V
V
SYMBOL
I
I
I
CC
-
V
I
(V)
V
CC
or
GND
V
CC
or
GND
V
IL
or V
IH
I
O
(mA)
-
0
V
O
=
V
CC
or
GND
25
o
C
MIN
-
-
-
TYP
-
-
-
MAX
±0.1
8
±0.5
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
MIN
-
-
-
MAX
±1
80
±5.0
MIN
-
-
-
MAX
±1
160
±10
UNITS
µA
µA
µA
V
CC
(V)
6
6
6
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
4
4.5
-
-
0.26
-
0.33
-
0.4
V
0
0
V
O
=
V
CC
or
GND
-
5.5
5.5
6
-
-
-
-
-
±0.1
8
±0.5
-
-
-
±1
80
±5.0
-
-
-
±1
160
±10
µA
µA
µA
∆I
CC
(Note 2)
V
CC
-2.1
4.5 to
5.5
-
100
360
-
450
-
490
µA
HCT Input Loading Table
INPUT
S0, S1, S2
I0 - I7
OE
UNIT LOADS
0.55
0.5
2.65
NOTE: Unit Load is
∆I
CC
limit specified in DC Electrical Table, e.g.,
360µA max at 25
o
C.
4
CD54HC251, CD74HC251, CD54HCT251, CD74HCT251
Switching Specifications
Input t
r
, t
f
= 6ns
TEST
CONDITIONS
25
o
C
V
CC
(V)
MIN
TYP
MAX
-40
o
C TO
85
o
C
MIN
MAX
-55
o
C TO
125
o
C
MIN
MAX
UNITS
PARAMETER
HC TYPES
Propagation Delay
Select to Outputs
SYMBOL
t
PLH,
t
PHL
C
L
= 50pF
2
4.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
21
-
-
-
12
-
-
-
11
-
-
-
-
-
-
60
245
49
-
42
175
35
-
30
140
28
-
24
75
15
13
10
15
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
305
61
-
52
220
44
-
37
175
35
-
30
95
19
16
10
15
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
370
74
-
63
265
53
-
45
210
42
-
36
110
22
19
10
15
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
pF
C
L
=15pF
C
L
= 50pF
Data to Outputs
t
PLH,
t
PHL
C
L
= 50pF
5
6
2
4.5
C
L
=15pF
C
L
= 50pF
Enable to High Z and Enable
from High Z
t
PLH,
t
PHL
C
L
= 50pF
5
6
2
4.5
C
L
=15pF
C
L
= 50pF
Output Transition Time
t
TLH
, t
THL
C
L
= 50pF
5
6
2
4.5
6
Input Capacitance
Three-State Output
Capacitance
Power Dissipation Capacitance
(Notes 3, 4)
HCT TYPES
Propagation Delay
Select to Outputs
C
IN
CO
C
PD
-
-
-
-
-
5
t
PLH
, t
PHL
C
L
= 50pF
C
L
=15pF
4.5
5
4.5
5
4.5
5
4.5
-
5
-
-
-
-
-
-
-
-
12
-
-
60
-
18
-
12
42
-
35
-
30
-
15
10
-
-
-
-
-
-
-
-
-
-
44
-
38
-
19
10
-
53
-
-
-
-
-
-
-
-
-
63
-
53
-
45
-
22
10
-
ns
ns
ns
ns
ns
ns
ns
pF
pF
Data to Outputs
t
PLH
, t
PHL
C
L
= 50pF
C
L
=15pF
Enable to High Z and Enable t
PLH
, t
PHL
C
L
= 50pF
from High Z
C
L
=15pF
Output Transition Time
Input Capacitance
Power Dissipation Capacitance
(Notes 3, 4)
NOTES:
t
TLH
, t
THL
C
L
= 50pF
C
IN
C
PD
-
-
3. C
PD
is used to determine the dynamic power consumption, per package.
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