EMS42GJA-50.000M
REGULATORY COMPLIANCE
2011/65 +
2015/863
(Data Sheet downloaded on Aug 25, 2020)
191 SVHC
ITEM DESCRIPTION
Spread Spectrum MEMS Clock Oscillators LVCMOS (CMOS) 2.5Vdc 4 Pad 2.0mm x 2.5mm Plastic Surface Mount (SMD)
50.000MHz ±100ppm Maximum over -40°C to +85°C Power Down (Disabled Output Logic Low) ±0.25% Center Spread
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
50.000MHz
±100ppm Maximum over -40°C to +85°C (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability
over the Operating Temperature Range, Supply Voltage Change, Output Load Change, First Year Aging at 25°C,
260°C Reflow, Shock, and Vibration)
±1ppm Maximum First Year
2.5Vdc ±10%
-0.5Vdc to +3.65Vdc
35mA Maximum (Unloaded; Nominal Vdd)
90% of Vdd Minimum (IOH=-8mA)
10% of Vdd Maximum (IOL=+8mA)
2nSec Maximum (Measured from 20% to 80% of waveform)
50 ±5(%) (Measured at 50% of waveform)
15pF Maximum
CMOS
Power Down (Disabled Output Logic Low)
70% of Vdd Minimum or No Connection to Enable Output, 30% of Vdd Maximum to Disable Output
50µA Maximum (Disabled Output: Logic Low) (Pad 1=Ground)
±0.25% Center Spread
30kHz Minimum, 32kHz Typical, 35kHz Maximum
40pSec Maximum (Cycle to Cycle; Spread Spectrum-On; Fo=133.333M, Vdd=2.5Vdc)
10mSec Maximum
-55°C to +125°C
Aging at 25°C
Supply Voltage
Maximum Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Output Control Function
Power Down Input Voltage (Vih and
Vil)
Standby Current
Spread Spectrum
Modulation Frequency
Period Jitter
Start Up Time
Storage Temperature Range
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
Flammability
Mechanical Shock
Moisture Resistance
Moisture Sensitivity Level
Resistance to Soldering Heat
Resistance to Solvents
Solderability
Temperature Cycling
Thermal Shock
Vibration
MIL-STD-883, Method 3015, Class 2, HBM 2000V
UL94-V0
MIL-STD-883, Method 2002, Condition G, 30,000G
MIL-STD-883, Method 1004
J-STD-020, MSL 1
MIL-STD-202, Method 210, Condition K
MIL-STD-202, Method 215
MIL-STD-883, Method 2003 (Pads on Bottom of Package Only)
MIL-STD-883, Method 1010, Condition B
MIL-STD-883, Method 1011, Condition B
MIL-STD-883, Method 2007, Condition A, 20G
www.ecliptek.com | Specification Subject to Change Without Notice | Revision E 03/04/2015 | Page 1 of 4
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
EMS42GJA-50.000M
Test Circuit for CMOS Output
Oscilloscope
Frequency
Counter
+
+
Power
Supply
_
+
Voltage
Meter
_
Current
Meter
_
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
0.01µF
(Note 1)
0.1µF
(Note 1)
Ground
C
L
(Note 3)
Tri-State or
Power Down or
Spread Disable
Note 1: An external 0.01µF ceramic bypass capacitor in parallel with a 0.1µF high frequency ceramic bypass
capacitor close (less than 2mm) to the package ground and supply voltage pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
www.ecliptek.com | Specification Subject to Change Without Notice | Revision E 03/04/2015 | Page 4 of 4
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
FPGA/CPLD
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