MJF15030 (NPN),
MJF15031 (PNP)
Complementary Power
Transistors
For Isolated Package Applications
Designed for general−purpose amplifier and switching applications,
where the mounting surface of the device is required to be electrically
isolated from the heatsink or chassis.
Features
http://onsemi.com
•
•
•
•
•
•
Electrically Similar to the Popular MJE15030 and MJE15031
150 V
CEO(sus)
8 A Rated Collector Current
No Isolating Washers Required
Reduced System Cost
High Current Gain−Bandwidth Product
−
f
T
= 30 MHz (Min) @ I
C
= 500 mAdc
•
UL Recognized, File #E69369, to 3500 V
RMS
Isolation
•
Pb−Free Packages are Available*
COMPLEMENTARY SILICON
POWER TRANSISTORS
8 AMPERES
150 VOLTS, 36 WATTS
MARKING
DIAGRAM
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎ Î Î
Î
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Î Î
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Î Î Î
Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î
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Rating
Symbol
V
CEO
V
CB
V
EB
Value
150
150
5
Unit
Vdc
Vdc
Vdc
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
RMS Isolation Voltage (Note 1)
Test No. 1 Per Figure 11
Test No. 2 Per Figure 12
Test No. 3 Per Figure 13
(for 1 sec, R.H. < 30%, T
A
= 25_C)
Collector Current
Base Current
−
Continuous
−
Peak
V
ISOL
4500
3500
1500
8
16
2
V
RMS
I
C
I
B
Adc
Adc
Total Power Dissipation (Note 2) @ T
C
= 25_C
Derate above 25_C
Total Power Dissipation @ T
A
= 25_C
Derate above 25_C
P
D
P
D
36
0.016
W
W/_C
W
W/_C
_C
2.0
0.016
Operating and Storage Temperature Range
Characteristic
T
J
, T
stg
–65 to +150
Max
3.5
MAXIMUM RATINGS
1
2
3
TO−220 FULLPACK
CASE 221D
STYLE 2
MJF1503xG
AYWW
MJF1503x = Specific Device Code
x = 0 or 1
G
= Pb−Free Package
A
= Assembly Location
Y
= Year
WW
= Work Week
ORDERING INFORMATION
Device
MJF15030
MJF15030G
MJF15031
MJF15031G
Package
TO−220 FULLPACK
Shipping
50 Units/Rail
THERMAL CHARACTERISTICS
Symbol
R
qJA
R
qJC
Unit
Thermal Resistance, Junction−to−Ambient
62.5
_C/W
_C/W
Thermal Resistance, Junction−to−Case (Note 2)
TO−220 FULLPACK 50 Units/Rail
(Pb−Free)
TO−220 FULLPACK
TO−220 FULLPACK
(Pb−Free)
50 Units/Rail
50 Units/Rail
Lead Temperature for Soldering Purposes
T
L
260
_C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Proper strike and creepage distance must be provided.
2. Measurement made with thermocouple contacting the bottom insulated
surface (in a location beneath the die), the devices mounted on a heatsink with
thermal grease and a mounting torque of
≥
6 in. lbs.
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
April, 2006
−
Rev. 5
1
Publication Order Number:
MJF15030/D
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Î
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Î
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Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î
Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
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Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î
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3. Pulse Test: Pulse Width
v
300
ms,
Duty Cycle
v
2%.
4. f
T
=
⎪h
fe
⎪•
f
test
.
DYNAMIC CHARACTERISTICS
ON CHARACTERISTICS
(Note 3)
OFF CHARACTERISTICS
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
ELECTRICAL CHARACTERISTICS
(T
C
= 25_C unless otherwise noted)
Current Gain
−
Bandwidth Product (Note 4)
(I
C
= 500 mAdc, V
CE
= 10 Vdc, f
test
= 10 MHz)
Base−Emitter On Voltage
(I
C
= 1 Adc, V
CE
= 2 Vdc)
Collector−Emitter Saturation Voltage
(I
C
= 1 Adc, I
B
= 0.1 Adc)
DC Current Gain Linearity
y
(V
CE
from 2 V to 20 V, I
C
from 0.1 A to 3 A) (NPN to PNP)
DC Current Gain (I
C
= 0.1 Adc, V
CE
= 2 Vdc)
(I
C
= 2 Adc, V
CE
= 2 Vdc)
(I
C
= 3 Adc, V
CE
= 2 Vdc)
(I
C
= 4 Adc, V
CE
= 2 Vdc)
Emitter Cutoff Current
(V
BE
= 5 Vdc, I
C
= 0)
Collector Cutoff Current
(V
CB
= 150 Vdc, I
E
= 0)
Collector Cutoff Current
(V
CE
= 150 Vdc, I
B
= 0)
Collector−Emitter Sustaining Voltage (Note 3)
(I
C
= 10 mAdc, I
B
= 0)
0.03
0.01
0.1
0.02
0.05
0.3
0.5
0.1
0.2
1
0.2 0.3
0.5
1
Characteristic
SINGLE PULSE
R
qJC(t)
= r(t) R
qJC
T
J(pk)
− T
C
= P
(pk)
R
qJC
(t)
2
MJF15030 (NPN), MJF15031 (PNP)
3
5
Figure 1. Thermal Response
10
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20 30
50
t, TIME (ms)
100
V
CEO(sus)
Symbol
V
CE(sat)
V
BE(on)
200 300
I
CBO
I
CEO
I
EBO
h
FE
h
FE
f
T
500
Min
150
30
40
40
40
20
−
−
−
−
−
1K
Typ
2
3
2K 3K
Max
0.5
10
10
10
−
1
−
−
−
−
−
5K
mAdc
mAdc
mAdc
MHz
Unit
Vdc
Vdc
Vdc
−
10K
2
MJF15030 (NPN), MJF15031 (PNP)
20
IC, COLLECTOR CURRENT (AMP)
10
5
3
2
1
5 ms
dc
100
ms
0.5
0.3
0.2
0.1
0.05
0.03
0.02
2
3
WIREBOND LIMIT
THERMAL LIMIT
SECONDARY BREAKDOWN
LIMIT @ T
C
= 25°C
50 70 100 150 200
5
7 10
20 30
V
CE
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
C
−
V
CE
limits of the transistor that must be observed for reliable
operation, i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figures 2 and 3 is based on T
J(pk)
= 150_C;
T
C
is variable depending on conditions. Second breakdown
pulse limits are valid for duty cycles to 10% provided T
J(pk)
< 150_C. T
J(pk)
may be calculated from the data in
Figure 1. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
Figure 2. Forward Bias Safe Operating Area
8
IC, COLLECTOR CURRENT (AMP)
1000
500
C, CAPACITANCE (pF)
200
100
50
30
20
10
1.5
3
5 7 10
30
50
V
R
, REVERSE VOLTAGE (VOLTS)
C
ob
(NPN)
C
ib
(NPN)
C
ib
(PNP)
5
C
ob
(PNP)
3
2
1
0
0
I
C
/I
B
= 10
T
C
= 25°C
V
BE(off)
= 9 V
5V
3V
1.5 V
0V
100 110 120 130 140 150
V
CE
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
100 150
Figure 3. Reverse Bias Switching Safe
Operating Area
BANDWIDTH PRODUCT (MHz)
100
hfe , SMALL−SIGNAL CURRENT GAIN
100
90
Figure 4. Capacitances
(PNP)
50
30
PNP
20
V
CE
= 10 V
I
C
= 0.5 A
T
C
= 25°C
NPN
60
50
(NPN)
10
f T, CURRENT GAIN
20
10
0
0.1
0.2
0.5
1
2
5
10
5
0.5
0.7
1
2
3
5
7
10
f, FREQUENCY (MHz)
I
C
, COLLECTOR CURRENT (AMP)
Figure 5. Small−Signal Current Gain
Figure 6. Current Gain — Bandwidth Product
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3
MJF15030 (NPN), MJF15031 (PNP)
DC CURRENT GAIN
1K
500
hFE, DC CURRENT GAIN
200
150
100
70
50
30
20
10
0.1
T
J
= 150°C
T
J
= 25°C
T
J
= −55°C
V
CE
= 2 V
hFE, DC CURRENT GAIN
1K
500
T
J
= 150°C
200
100
50
20
10
0.1
T
J
= 25°C
T
J
= −55°C
V
CE
= 2 V
0.2
0.5
1
2
5
10
0.2
I
C
, COLLECTOR CURRENT (AMP)
0.5
1
2
I
C
, COLLECTOR CURRENT (AMP)
5
10
Figure 7a. MJF15030 NPN
Figure 7b. MJF15031 PNP
“ON” VOLTAGE
T
J
= 25°C
1.6
V, VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
1.4
1.2
1
V
BE(sat)
@ I
C
/I
B
= 10
0.6
V
BE(on)
@ V
CE
= 2 V
V
CE(sat)
@ I
C
/I
B
= 20
0.2
0.5
1
2
1.8
1
0.8
V
BE(sat)
@ I
C
/I
B
= 10
V
CE(sat)
@ I
C
/I
B
= 20
V
BE(sat)
@ I
C
/I
B
= 20
I
C
/I
B
= 10
1
2
5
10
0.4
0.2
0.1
I
C
/I
B
= 10
5
10
0
0.1
0.2
0.5
I
C
, COLLECTOR CURRENT (AMP)
I
C
, COLLECTOR CURRENT (AMP)
Figure 8a. MJF15030 NPN
Figure 8b. MJF15031 PNP
1
0.5
V
CC
= 80 V
I
C
/I
B
= 10
T
J
= 25°C
t
d
(NPN, PNP)
t, TIME (
μ
s)
t
r
(PNP)
10
5
3
2
t
s
(PNP)
1
0.5
t
r
(NPN)
0.2
0.1
0.1
t
f
(NPN)
0.2
0.3
0.5
1
2
5
10
t
f
(PNP)
V
CC
= 80 V
I
C
/I
B
= 10, I
B1
= I
B2
t
s
(NPN) T
J
= 25°C
t, TIME (
μ
s)
0.2
0.1
0.05
0.03
0.02
0.01
0.1
0.2
0.5
1
2
5
10
I
C
, COLLECTOR CURRENT (AMP)
I
C
, COLLECTOR CURRENT (AMP)
Figure 9. Turn−On Times
Figure 10. Turn−Off Times
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4
MJF15030 (NPN), MJF15031 (PNP)
TEST CONDITIONS FOR ISOLATION TESTS*
MOUNTED
FULLY ISOLATED
PACKAGE
LEADS
MOUNTED
FULLY ISOLATED
PACKAGE
MOUNTED
FULLY ISOLATED
PACKAGE
CLIP
CLIP
0.099" MIN
LEADS
0.099" MIN
LEADS
HEATSINK
0.110" MIN
HEATSINK
HEATSINK
Figure 11. Clip Mounting Position
for Isolation Test Number 1
Figure 12. Clip Mounting Position
for Isolation Test Number 2
Figure 13. Screw Mounting Position
for Isolation Test Number 3
*Measurement made between leads and heatsink with all leads shorted together
MOUNTING INFORMATION
4−40 SCREW
PLAIN WASHER
CLIP
HEATSINK
COMPRESSION WASHER
NUT
HEATSINK
Figure 14. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to
8 in
.
lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a constant pressure on the package
over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in
.
lbs will cause the
plastic to crack around the mounting hole, resulting in a loss of isolation capability.
Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in
.
lbs without adversely affecting the package. However,
in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend exceeding 10 in
.
lbs of mount-
ing torque under any mounting conditions.
** For more information about mounting power semiconductors see Application Note AN1040.
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