S E M I C O N D U C T O R
CDP68HC05C16B,
CDP68HCL05C16B,
CDP68HSC05C16B
8-Bit Enhanced Microcontroller Series
Description
The CDP68HC05C16B HCMOS Microcomputer is a new
member of the CDP68HC05 family of low-cost single chip
microcomputers. It is an enhanced version of the
CDP68HC05C8B. Enhancements include a larger RAM and
ROM sizes (352 bytes of RAM, 15,936 bytes of ROM), key-
board scanning logic, a high current output pin, an advanced
watchdog (COP) timer, a low power oscillator that can "wake
up" the CPU from STOP mode and fixed tone outputs. This
8-bit microcomputer unit (MCU) also contains an on-chip
oscillator, CPU, 31 bidirectional I/O pins, two serial interface
systems, and 16 bit capture/compare timer. The fully static
design allows operation at frequencies down to DC, further
reducing its already low-power consumption.
The CDP68HCL05C16B MCU is a low-power version of the
CDP68HC05C16B. It contains all the features of the
CDP68HC05C16B with additional features of lower power
consumption in the RUN, WAIT and STOP modes; and low
voltage operation down to 2.4V.
The CDP68HSC05C16B MCU is a high-speed version of
the CDP68HC05C16B. It also contains all the features of
the CDP68HC05C16B with the additional capability of
higher frequency operation at 8.0MHz.
June 1997
Features
HARDWARE
• 8-Bit HCMOS Microcontroller
• Extended Version of MC68HC05C9A Family
- Pin for Pin Compatible
• Power-Saving Stop, Wait and Data Retention Modes
• Fully Static Operation
• On-Chip Memory
- 352 Bytes RAM
- 15,936 Bytes ROM
• Keyboard Scanning Logic
• Watchdog Timer (COP) and Clock Monitor
• Low Power Wake Up Oscillator
• 31 Bidirectional I/O Lines
- 1 High Current Output for LED Drive (PC7)
• Bidirectional RESET pin
• Internal 16-Bit Timer
• Serial Communications Interface (SCI) System
• Serial Peripheral Interface (SPI) System
• Fixed Frequency Tone/Simple PWM Outputs (Mask
Programmable)
• Self-Check Mode
• External, Timer, SCI, and SPI Interrupts
• Master Reset and Power-On Reset
• On-Chip Oscillator with RC or Crystal Mask Options
• CDP68HC05C16B
- 4.2MHz Oscillator (2.1MHz Internal Bus Frequency)
at 5V; 2.0MHz (1.0MHz Internal Bus) at 3.0V
- Single 3.0V to 6.0V Supply (1.5V Data Retention
Mode)
• CDP68HCL05C16B
- Lower Supply Current, I
DD
in RUN, WAIT and STOP
Modes at 5.5V, 2.5V and 1.8V
- Single 1.8V to 6.0V Supply (1.5V Data Retention Mode)
• CDP68HSC05C16B
- 8.0MHz Oscillator (4.0MHz Internal Bus Frequency)
- Single 2.4V to 6.0V Supply (1.5V Data Retention Mode)
SOFTWARE
•
•
•
•
•
•
Complete 68HC05 Instruction Set
Efficient Use of Program Space
Memory Mapped I/O
Versatile Interrupt Handling
True Bit Manipulation
Addressing Modes with Indexed Addressing for
Accessing Tables
Table Of Contents
Ordering Information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinouts
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
MCU Block Diagram
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Characterization Curves.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical and Timing Specifications.
. . . . . . . . . . . . . . . . . . . . . 6
Functional Pin Description.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Input/Output Programming
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Software Programmable Options
. . . . . . . . . . . . . . . . . . . . . . . 28
Memory Maps
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Memory
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Self-Check Mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Resets, Interrupts and Low Power Modes
. . . . . . . . . . . . . . . . 32
Hardware/Power-On Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
COP/Clock Monitor System . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Wake Up Timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Programmable Timer
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Output Compare. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Input Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Serial Communications Interface (SCI)
. . . . . . . . . . . . . . . . . . . 44
Serial Peripheral Interface (SPI).
. . . . . . . . . . . . . . . . . . . . . . . . 51
Port A Tone and Simple PWM Circuitry
. . . . . . . . . . . . . . . . . . 57
Effects of STOP and WAIT Modes
. . . . . . . . . . . . . . . . . . . . . . . 57
Package Outline Dimensions
. . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Opcode Map.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
I/O, Control, Status and Data Register Definitions.
. . . . . . . . . 66
Ordering Information Sheet
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1997
File Number
4249
1
CDP68HC05C16B, CDP68HCL05C16B, CDP68HSC05C16B
Ordering Information
PART NUMBER
CDP68HC05C16BE
CDP68HC05C16BN
CDP68HC05C16BQ
CDP68HC05C16BSE
CDP68HC05C16BD
CDP68HC05C16BH
CDP68HCL05C16BE
CDP68HCL05C16BN
CDP68HCL05C16BQ
CDP68HCL05C16BSE
CDP68HCL05C16BD
CDP68HCL05C16BH
CDP68HSC05C16BE
CDP68HSC05C16BN
CDP68HSC05C16BQ
CDP68HSC05C16BSE
CDP68HSC05C16BD
CDP68HSC05C16BH
PACKAGE
40 Ld PDIP
44 Ld PLCC
44 Ld MQFP
42 Ld SPDIP
40 Ld SBDIP
Chip
40 Ld PDIP
44 Ld PLCC
44 Ld MQFP
42 Ld SPDIP
40 Ld SBDIP
Chip
40 Ld PDIP
44 Ld PLCC
44 Ld MQFP
42 Ld SPDIP
40 Ld SBDIP
Chip
E40.6
N44.65
Q44.10x10
E42.6C
D40.6
E40.6
N44.65
Q44.10x10
E42.6C
D40.6
PKG. NO.
E40.6
N44.65
Q44.10x10
E42.6C
D40.6
Data Format Options
The ROM data can be submitted in various formats. The fol-
lowing list summarizes the principal formats which Harris will
accept. The list is in order of preference, with S-Record for-
matted data files being the preferred format.
• S-Record Formatted Hex Data File via modem upload
• S-Record Formatted Hex Data File on floppy disk
• S-Record Formatted Hex Data File via e-mail
• 6805 Assembly Language Source File on floppy disk
• Contents of a 27XX type EPROM/EEPROM
Regardless of the medium used to transfer the data, con-
tents of all of the User ROM regions of the memory map of
the particular microcontroller should be specified. This
includes any Page 0 User ROM and User Reset/Interrupt
Vectors. Data should not be specified for the Self Check
ROM space of a device. All unused locations should either
not be specified (S-Record and source files) or specified as
$00 (EPROM/EEPROM).
Procedure for Submitting Data
When submitting data via a physical medium such as a
floppy disk or EPROM, the “Ordering Information Sheet” at
the end of this document must be completed and submitted
with the data.
When utilizing the Harris Customer Pattern Retrieval System
(modem upload) the customer will be prompted for the same
information as that specified on the “Ordering Information
Sheet”.
If the data is submitted via e-mail, the message should
include the same information as that specified on the “Order-
ing Information Sheet”.
Harris Customer Pattern Retrieval System
To access the Harris Customer Pattern Retrieval System,
you must first obtain an account ID and password from your
Harris sales representative. The system is accessed by dial-
ing 1-908-685-6541. It is presently set to run with baud rates
up to 2400 baud, with 8 data bits, 1 stop bit, and no parity bit.
The data transfer is done using text mode Kermit transfers.
Check the Harris Corporate internet site, www.harris.com,
for the latest information on the Harris Customer Pattern
Retrieval System.
NOTE: Pin number references throughout this specification refer to
the 40 lead DIP. See pinouts for cross reference.
ROM Ordering Information
The CDP68HC05C16B family of microcontrollers contains
mask programmed ROMs. The contents of these ROMs are
personalized to meet a customer’s code requirements during
manufacturing of the ICs. The code is programmed via pho-
tomasking techniques. Semiconductor manufacturing is a
batch process, and all microcontrollers manufactured in a
given lot (a batch) will contain identical ROM code.
Harris generates a customer’s ROM mask from an ASCII
representation of the desired ROM contents together with
other specific information. The following pages contain
sheets which can be used to provide the required informa-
tion when ordering a masked ROM microcontroller.
2
CDP68HC05C16B, CDP68HCL05C16B, CDP68HSC05C16B
Standard Pinouts
CDP68HC05C16B, CDP68HCL05C16B
CDP68HSC05C16B
(SBDIP, PDIP)
TOP VIEW
RESET 1
IRQ
NC
PA7
PA6
PA5
PA4
PA3
PA2
2
3
4
5
6
7
8
9
40 V
DD
39 OSC1
38 OSC2
37 TCAP
36 PD7
35 TCMP
34 PD5/SS
33 PD4/SCK
32 PD3/MOSI
31 PD2/MISO
30 PD1/TDO
29 PD0/RDI
28 PC0
27 PC1
26 PC2
25 PC3
24 PC4
23 PC5
22 PC6
21 PC7
PB4
PB5
PB6
PB7
V
SS
NC
PC7
PC6
PC5
PC4
PC3
PA5
PA4
PA3
PA2
PA1
PA0
PB0
PB1
PB2
PB3
NC
7
8
9
10
11
12
13
14
15
16
17
18 19 20 21 22 23 24 25 26 27 28
CDP68HC05C16B, CDP68HCL05C16B
CDP68HSC05C16B
(PLCC)
TOP VIEW
PA6
PA7
NC
NC
IRQ
RESET
V
DD
OSC1
OSC2
TCAP
PD7
6
5
4
3
2
1 44 43 42 41 40
39
38
37
36
35
34
33
32
31
30
29
PA1 10
PA0 11
PB0 12
PB1 13
PB2 14
PB3 15
PB4 16
PB5 17
PB6 18
PB7 19
V
SS
20
NC
TCMP
PD5/SS
PD4/SCK
PD3/MOSI
PD2/MISO
PD1/TDO
PD0/RDI
PC0
PC1
PC2
Note: For compatibility with CDP68HC05C4B/C8B
devices in 44-pin PLCC, tie pins 17 and 18
together and tie pins 39 and 40 together.
CDP68HC05C16B, CDP68HCL05C16B
CDP68HSC05C16B
(SPDIP)
TOP VIEW
RESET
IRQ
NC
PA7
PA6
PA5
PA4
PA3
PA2
1
2
3
4
5
6
7
8
9
42 V
DD
41 OSC1
40 OSC2
39 TCAP
38 PD7
37 TCMP
36 PD5/SS
35 PD4/SCK
34 PD3/MOSI
33 PD2/MISO
32 PD1/TDO
31 PD0/RDI
30 PC0
29 PC1
28 PC2
27 NC
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PB0
PB1
PB2
PB3
CDP68HC05C16B, CDP68HCL05C16B
CDP68HSC05C16B
(MQFP)
TOP VIEW
RESET
OSC1
OSC2
TCAP
V
DD
PD7
PA7
IRQ
NC
NC
NC
1
44 43 42 41 40 39 38 37 36 35 34
33
2
32
3
4
5
6
7
8
9
31
30
29
28
27
26
25
TCMP
PD5/SS
PD4/SCK
PD3/MOSI
PD2/MISO
PD1/TDO
PD0/RDI
PC0
PC1
PC2
PC3
PA1 10
PA0 11
PB0 12
PB1 13
PB2 14
PB3 15
NC 16
PB4 17
PB5 18
PB6 19
PB7 20
V
SS
21
24
10
11
23
12 13 14 15 16 17 18 19 20 21 22
PB4
PB5
PB6
PB7
PC7
PC6
PC5
PC4
V
SS
NC
25 PC4
24 PC5
23 PC6
22 PC7
3
NC
26 PC3
CDP68HC05C16B, CDP68HCL05C16B, CDP68HSC05C16B
Microcomputer Block Diagram
OSC1
39
TCMP
TCAP
35
37
16 BIT
TIMER SYSTEM
OSCILLATOR
÷
2
INTERNAL
PROCESSOR
CLOCK
OSC2
38
COP SYSTEM
CLOCK MONITOR
WAKE UP OSCILLATOR
1
2
BAUD RATE
GENERATOR
A
INDEX
REGISTER
X
CC
S
ALU
28
27
26
25
24
23
22
21
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
SPI
CPU
PORT D DIRECTION
CPU
CONTROL
SCI
29
30
31
32
33
34
36
PD0 (RDI)
PD1 (TDO)
PD2 (MISO)
PD3 (MOSI)
PD4 (SCK)
PD5 (SS)
PD7
RESET
IRQ
TONE GEN
11
10
9
8
7
6
5
4
12
13
14
15
16
17
18
19
8
CONDITION CODE
5
REGISTER
6
STACK
POINTER
PORT B
I/O
LINES
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PORT B INTERRUPT
PORT B DIRECTION
PORT B DATA REG
PROGRAM COUNTER
HIGH
6
PCH
8
PROGRAM
COUNTER LOW
PCL
PORT D DATA REG
PORT A
I/O
LINES
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PORT A DIRECTION
PORT A TONE OPT
PORT A DATA REG
ACCUMULATOR
8
15,936 x 8 ROM
240 x 8
SELF-CHECK
ROM
352 x 8
STATIC RAM
DATA
DIR
REG
PORT
C
REG
PORT C
I/O
LINES
Power Considerations
The average chip-junction temperature, T
J
, in
o
C can be
obtained from:
T
J
= T
A
+ (P
D
•
θ
JA
)
Where:
(EQ. 1)
V
DD
= 4.5V
PA0-7, PB0-7, PC0-7, PD7
PD0-5
V
DD
= 3.0V
PA0-7, PB0-7, PC0-7, PD7
PD0-5
10.19kΩ
6kΩ
6.32kΩ
6kΩ
50pF
200pF
3.26kΩ
1.9kΩ
2.38kΩ
2.26kΩ
50pF
200pF
PINS
R
1
R
2
C
T
A
= Ambient Temperature,
o
C
θ
JA
= Package Thermal Resistance,
Junction-to-Ambient,
o
C/W
P
D
= P
INT
+ P
I/O
P
INT
= I
CC
x V
CC
, Watts - Chip Internal Power
P
I/O
= Power Dissipation on Input and Output
Pins - User Determined
For most applications P
I/O
<< P
INT
and can be neglected.
An approximate relationship between P
D
and T
J
(if P
I/O
is
neglected) is:
P
D
= K
÷
(T
J
+ 273
o
C)
Solving Equation 1 and Equation 2 for K gives:
K = P
D
• (T
A
+ 273
o
C) +
θ
JA
• P
D
2
(EQ. 3)
(EQ. 2)
R
2
TEST
POINT
C
R
1
V
DD
Where K is a constant pertaining to the particular part. K can
be determined from Equation 3 by measuring P
D
(at equilib-
rium) for a known T
A
. Using this value of K the values of P
D
and T
J
can be obtained by solving Equation 1 and Equation 2
iteratively for any value of T
A
.
EQUIVALENT TEST LOAD
4
CDP68HC05C16B, CDP68HCL05C16B, CDP68HSC05C16B
I
OL
, HIGH CURRENT OUTPUT N-CHANNEL
SINK CURRENT (mA)
I
OH
, HIGH CURRENT OUTPUT P-CHANNEL
SOURCE CURRENT (mA)
120.0
100.0
80.0
60.0
V
DD
= 3.3V
40.0
20.0
V
DD
= 2.0V
V
DD
= 5.0V
V
DD
= 4.5V
V
DD
= 2.0V
-5.0
-10.0
V
DD
= 3.3V
-15.0
-20.0
-25.0
-30.0
0
V
DD
= 4.5V
V
DD
= 5.0V
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
V
O
, OUTPUT VOLTAGE REFERENCED TO V
DD
(V)
0
1.0
2.0
3.0
4.0
5.0
6.0
V
O
, OUTPUT VOLTAGE (V)
FIGURE 1A. TYPICAL PC7 PORT OUTPUT P-CHANNEL SOURCE
CURRENT FOR V
DD
= 2V, 3.3V, 4.5V AND 5V AT 25
o
C
FIGURE 1B. TYPICAL PC7 PORT OUTPUT N-CHANNEL SINK
CURRENT FOR V
DD
= 2V, 3.3V, 4.5V AND 5V AT
25
o
C
I
OH
, STANDARD OUTPUT P-CHANNEL
SOURCE CURRENT (mA)
I
OL
, STANDARD OUTPUT N-CHANNEL
SINK CURRENT (mA)
V
DD
= 2.0V
-2.0
V
DD
= 3.3V
-4.0
-6.0
V
DD
= 4.5V
V
DD
= 5.0V
-8.0
-10.0
-12.0
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
0
30.0
25.0
20.0
15.0
10.0
5.0
V
DD
= 3.3V
V
DD
= 5.0V
V
DD
= 4.5V
V
DD
= 2.0V
0
1.0
2.0
3.0
4.0
5.0
6.0
V
O
, OUTPUT VOLTAGE REFERENCED TO V
DD
(V)
V
O
, OUTPUT VOLTAGE (V)
FIGURE 1C. TYPICAL PORT OUTPUT P-CHANNEL SOURCE
CURRENT FOR V
DD
= 2V, 3.3V, 4.5V AND 5V AT
25
o
C
FIGURE 1D. TYPICAL PORT OUTPUT N-CHANNEL SINK
CURRENT FOR V
DD
= 2V, 3.3V, 4.5V AND 5V AT
25
o
C
20.0
16.0
12.0
8.0
4.0
2.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
I
DD
, OPERATING CURRENT (mA)
12.0
10.0
8.0
6.0
4.0
2.0
V
DD
= 5V, T = 25
o
C
0
4
8
12
16
20
V
DD
= 2V, T = 25
o
C
V
DD
, OPERATING VOLTAGE (V)
f
osc
, CRYSTAL OSCILLATOR
FREQUENCY (MHz)
f
osc
, CRYSTAL OSCILLATOR FREQUENCY (MHz)
FIGURE 1E. TYPICAL CRYSTAL OSCILLATOR OPERATING
FREQUENCIES vs OPERATING VOLTAGE, V
DD
AT
25
o
C
FIGURE 1F. TYPICAL SUPPLY CURRENT vs OPERATING
FREQUENCY AT 25
o
C
5
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