CDP68HC05C4B, CDP68HC05C8B,
CDP68HCL05C4B, CDP68HCL05C8B,
CDP68HSC05C4B, CDP68HSC05C8B
March 1998
8-Bit Enhanced Microcontroller Series
Description
The CDP68HC05C4B HCMOS Microcomputer is a new mem-
ber of the CDP68HC05 family of low-cost single chip microcom-
puters. It is an enhanced version of the CDP68HC05C4. The
enhancements include keyboard scanning logic, a high current
output pin, a watchdog timer, fixed tone outputs, and a maskable
STOP instruction. This 8-bit microcomputer unit (MCU) also
contains an on-chip oscillator, CPU, 176 bytes of RAM, 4160
bytes of user ROM in the CDP68HC05C4B and 7744 bytes of
user ROM in the CDP68HC05C8B, I/O, two serial interface sys-
tems, and timer. The fully static design allows operation at fre-
quencies down to DC, further reducing its already low-power
consumption.
All
information
pertaining
to
the
CDP68HC05C4B MCU applies to the CDP68HC05C8B with
the exception of the memory description.
The CDP68HCL05C4B and CDP68HCL05C8B MCU devices
are low-power versions of the CDP68HC05C4B and
CDP68HC05C8B, respectively. They contain all the features of
the CDP68HC05C4B and CDP68HC05C8B with additional fea-
tures of lower power consumption in the RUN, WAIT and STOP
modes; and low voltage operation down to 2.4V. The
CDP68HSC05C4B and CDP68HSC05C8B MCU devices are
high-speed
versions
of
the
CDP68HC05C4B
and
CDP68HC05C8B, respectively. They also contain all the fea-
tures of the CDP68HC05C4B and CDP68HC05C8B with the
and have a higher frequency operation (up to 8.0MHz).
Features
HARDWARE
• 8-Bit HCMOS Microcontroller
• Extended Version of MC68HC05C4A/C8A Family
- Pin for Pin Compatible
• Power-Saving Stop, Wait and Data Retention Modes
- STOP Instruction can be Disabled via Mask Option
• Fully Static Operation
• On-Chip Memory
- CDP68HC05C4B, 68HCL05C4B, 68HSC05C4B
- 176 Bytes RAM, 4160 Bytes ROM
- CDP68HC05C8B, 68HCL05C8B, 68HSC05C8B
- 176 Bytes RAM, 7744 Bytes ROM
• Keyboard Scanning Logic
• Watchdog Timer (COP)
• 24 Bidirectional I/O Lines and 7 Input-Only Lines
- 1 High Current Output for LED drive (PC7)
• Internal 16-Bit Timer
• Serial Communications Interface (SCI) System
• Serial Peripheral Interface (SPI) System
• Fixed Frequency Tone/Simple PWM Outputs (Mask
Programmable)
• Self-Check Mode
• External, Timer, SCI, and SPI Interrupts
• Master Reset and Power-On Reset
• On-Chip Oscillator with RC or Crystal Mask Options
• CDP68HC05C4B, CDP68HC05C8B
- 4.2MHz Oscillator (2.1MHz Internal Bus Frequency)
at 5V; 2.0MHz (1.0MHz Internal Bus) at 3.0V
- Single 3.0V to 6.0V Supply (1.2V Data Retention
Mode)
• CDP68HCL05C4B, CDP68HCL05C8B
- Lower Supply Current, I
DD
in RUN, WAIT and STOP
Modes at 5.5V, 2.5V and 1.8V
- Single 1.8V to 6.0V Supply (1.2V Data Retention
Mode)
• CDP68HSC05C4B, CDP68HSC05C8B
- 8.0MHz Oscillator (4.0MHz Internal Bus Frequency)
- Single 2.4V to 6.0V Supply (1.2V Data Retention
Mode)
SOFTWARE
•
•
•
•
•
•
Complete 68HC05 Instruction Set
Efficient Use of Program Space
Memory Mapped I/O
Versatile Interrupt Handling
True Bit Manipulation
Addressing Modes with Indexed Addressing for
Accessing Tables
Table of Contents
Ordering Information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinouts
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
MCU Block Diagram
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Characterization Curves.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical and Timing Specifications.
. . . . . . . . . . . . . . . . . . . . . 6
Functional Pin Description.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Input/Output Programming
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Memory Maps
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Memory
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Self Check Mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Resets, Interrupts and Low Power Modes
. . . . . . . . . . . . . . . . 30
Hardware/Power-On Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
COP Watchdog System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Programmable Timer
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Output Compare. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Input Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Serial Communications Interface (SCI)
. . . . . . . . . . . . . . . . . . . 40
Serial Peripheral Interface (SPI).
. . . . . . . . . . . . . . . . . . . . . . . . 45
Port A Tone and Simple PWM Circuitry
. . . . . . . . . . . . . . . . . . 52
Effects of STOP and WAIT modes
. . . . . . . . . . . . . . . . . . . . . . . 53
Package Outline Dimensions
. . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Opcode Map.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
I/O, Control, Status and Data Register Definitions.
. . . . . . . . . 61
Ordering Information Sheet
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
©
Intersil Corporation 1999
File Number
4157.1
1
CDP68HC05C4B/C8B, CDP68HCL05C4B/C8B, CDP68HSC05C4B/C8B
Ordering Information
PART NUMBER
CDP68HC05C4BE
CDP68HC05C4BN
CDP68HC05C4BQ
CDP68HC05C4BSE
CDP68HC05C4BD
CDP68HC05C4BH
CDP68HCL05C4BE
CDP68HCL05C4BN
CDP68HCL05C4BQ
CDP68HCL05C4BSE
CDP68HCL05C4BD
CDP68HCL05C4BH
CDP68HSC05C4BE
CDP68HSC05C4BN
CDP68HSC05C4BQ
CDP68HSC05C4BSE
CDP68HSC05C4BD
CDP68HSC05C4BH
PACKAGE
40 Ld PDIP
44 Ld PLCC
44 Ld MQFP
42 Ld SPDIP
40 Ld SBDIP
Chip
40 Ld PDIP
44 Ld PLCC
44 Ld MQFP
42 Ld SPDIP
40 Ld SBDIP
Chip
40 Ld PDIP
44 Ld PLCC
44 Ld MQFP
42 Ld SPDIP
40 Ld SBDIP
Chip
E40.6
N44.65
Q44.10x10
E42.6C
D40.6
E40.6
N44.65
Q44.10x10
E42.6C
D40.6
PKG. NO.
E40.6
N44.65
Data Format Options
The ROM data can be submitted in various formats. The fol-
lowing list summarizes the principal formats which Intersil
will accept. The list is in order of preference, with S-Record
formatted data files being the preferred format.
• S-Record Formatted Hex Data File via modem upload
Q44.10x10
E42.6C
D40.6
• S-Record Formatted Hex Data File via e-mail
• S-Record Formatted Hex Data File on floppy disk
• 6805 Assembly Language Source File on floppy disk
• Contents of a 27XX type EPROM/EEPROM
Regardless of the medium used to transfer the data, con-
tents of all of the User ROM regions of the memory map of
the particular microcontroller should be specified. This
includes any Page 0 User ROM and User Reset/Interrupt
Vectors. Data should not be specified for the Self Check
ROM space of a device. All unused locations should either
not be specified (S-Record and source files) or specified as
$00 (EPROM/EEPROM). Any unspecified locations will be
filled with $00 by Intersil.
Procedure for Submitting Data
When submitting data via a physical medium such as a
floppy disk or EPROM, the “Ordering Information Sheet” at
the end of this document must be completed and submitted
with the data.
If the data is submitted via e-mail, the message should
include the same information as that specified on the “Order-
ing Information Sheet”.
NOTE: Pin number references throughout this specification refer to
the 40 lead DIP. See pinouts for cross reference.
ROM Ordering Information
The CDP68HC05C4B and CDP68HC05C8B families of
microcontrollers contain mask programmed ROMs. The con-
tents of these ROMs are personalized to meet a customer’s
code requirements during manufacturing of the ICs. The
code is programmed via photomasking techniques. Semi-
conductor manufacturing is a batch process, and all micro-
controllers manufactured in a given lot (a batch) will contain
identical ROM code.
Intersil generates a customer’s ROM mask from an ASCII
representation of the desired ROM contents together with
other specific information. The end of this document con-
tains a sheet which can be used to provide the required
information when ordering a masked ROM microcontroller.
2
CDP68HC05C4B/C8B, CDP68HCL05C4B/C8B, CDP68HSC05C4B/C8B
Pinouts
CDP68HC05C4B, CDP68HC05C8B
CDP68HCL05C4B, CDP68HCL05C8B
CDP68HSC05C4B, CDP68HSC05C8B
(SBDIP, PDIP)
TOP VIEW
RESET 1
IRQ
NC
PA7
PA6
PA5
PA4
PA3
PA2
2
3
4
5
6
7
8
9
40 V
DD
39 OSC1
38 OSC2
37 TCAP
36 PD7
35 TCMP
34 PD5/SS
33 PD4/SCK
32 PD3/MOSI
31 PD2/MISO
30 PD1/TDO
29 PD0/RDI
28 PC0
27 PC1
26 PC2
25 PC3
24 PC4
23 PC5
22 PC6
21 PC7
NC
PB5
PB6
PB7
V
SS
NC
PC7
PC6
PC5
PC4
PC3
PA5
PA4
PA3
PA2
PA1
PA0
PB0
PB1
PB2
PB3
PB4
7
8
9
10
11
12
13
14
15
16
17
18 19 20 21 22 23 24 25 26 27 28
CDP68HC05C4B, CDP68HC05C8B
CDP68HCL05C4B, CDP68HCL05C8B
CDP68HSC05C4B, CDP68HSC05C8B
(PLCC)
TOP VIEW
PA6
PA7
NC
NC
IRQ
RESET
V
DD
OSC1
OSC2
TCAP
NC
6
5
4
3
2
1 44 43 42 41 40
39
38
37
36
35
34
33
32
31
30
29
PA1 10
PA0 11
PB0 12
PB1 13
PB2 14
PB3 15
PB4 16
PB5 17
PB6 18
PB7 19
V
SS
20
PD7
TCMP
PD5/SS
PD4/SCK
PD3/MOSI
PD2/MISO
PD1/TDO
PD0/RDI
PC0
PC1
PC2
CDP68HC05C4B, CDP68HC05C8B
CDP68HCL05C4B, CDP68HCL05C8B
CDP68HSC05C4B, CDP68HSC05C8B
(SPDIP)
TOP VIEW
RESET
IRQ
NC
PA7
PA6
PA5
PA4
PA3
PA2
1
2
3
4
5
6
7
8
9
42 V
DD
41 OSC1
40 OSC2
39 TCAP
38 PD7
37 TCMP
36 PD5/SS
35 PD4/SCK
34 PD3/MOSI
33 PD2/MISO
32 PD1/TDO
31 PD0/RDI
30 PC0
29 PC1
28 PC2
27 NC
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PB0
PB1
PB2
PB3
1
CDP68HC05C4B, CDP68HC05C8B
CDP68HCL05C4B, CDP68HCL05C8B
CDP68HSC05C4B, CDP68HSC05C8B
(MQFP)
TOP VIEW
RESET
OSC1
OSC2
TCAP
V
DD
PD7
PA7
IRQ
NC
NC
NC
44 43 42 41 40 39 38 37 36 35 34
33
2
32
3
4
5
6
7
8
9
31
30
29
28
27
26
25
TCMP
PD5/SS
PD4/SCK
PD3/MOSI
PD2/MISO
PD1/TDO
PD0/RDI
PC0
PC1
PC2
PC3
PA1 10
PA0 11
PB0 12
PB1 13
PB2 14
PB3 15
NC 16
PB4 17
PB5 18
PB6 19
PB7 20
V
SS
21
24
10
11
23
12 13 14 15 16 17 18 19 20 21 22
PB4
PB5
PB6
PB7
PC7
PC6
PC5
PC4
V
SS
NC
25 PC4
24 PC5
23 PC6
22 PC7
NOTE: Low EMI Pinouts Available. Refer to Intersil Tech Brief TB354 for more information
3
NC
26 PC3
CDP68HC05C4B/C8B, CDP68HCL05C4B/C8B, CDP68HSC05C4B/C8B
I
OH
, HIGH CURRENT OUTPUT P-CHANNEL
SOURCE CURRENT (mA)
I
OL
, HIGH CURRENT OUTPUT N-CHANNEL
SINK CURRENT (mA)
120.0
V
DD
= 5.0V
V
DD
= 4.5V
100.0
80.0
60.0
V
DD
= 3.3V
40.0
20.0
V
DD
= 2.0V
V
DD
= 2.0V
-5.0
-10.0
V
DD
= 3.3V
-15.0
-20.0
-25.0
-30.0
0
V
DD
= 4.5V
V
DD
= 5.0V
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
V
O
, OUTPUT VOLTAGE REFERENCED TO V
DD
(V)
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
V
O
, OUTPUT VOLTAGE (V)
FIGURE 1A. TYPICAL PC7 PORT OUTPUT P-CHANNEL SOURCE
CURRENT FOR V
DD
= 2V, 3.3V, 4.5V AND 5V AT
25
o
C
FIGURE 1B. TYPICAL PC7 PORT OUTPUT N-CHANNEL SINK
CURRENT FOR V
DD
= 2V, 3.3V, 4.5V AND 5V AT
25
o
C
I
OL
, STANDARD OUTPUT N-CHANNEL
SINK CURRENT (mA)
-2.0
V
DD
= 3.3V
-4.0
-6.0
V
DD
= 4.5V
V
DD
= 5.0V
-8.0
-10.0
-12.0
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
0
I
OH
, STANDARD OUTPUT P-CHANNEL
SOURCE CURRENT (mA)
V
DD
= 2.0V
30.0
25.0
20.0
15.0
10.0
5.0
V
DD
= 3.3V
V
DD
= 5.0V
V
DD
= 4.5V
V
DD
= 2.0V
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
V
O
, OUTPUT VOLTAGE REFERENCED TO V
DD
(V)
V
O
, OUTPUT VOLTAGE (V)
FIGURE 1C. TYPICAL PORT OUTPUT P-CHANNEL SOURCE
CURRENT FOR V
DD
= 2V, 3.3V, 4.5V AND 5V AT
25
o
C
FIGURE 1D. TYPICAL PORT OUTPUT N-CHANNEL SINK
CURRENT FOR V
DD
= 2V, 3.3V, 4.5V AND 5V AT
25
o
C
12.0
I
DD
, OPERATING CURRENT (mA)
f
osc
, CRYSTAL OSCILLATOR
FREQUENCY (MHz)
20.0
16.0
12.0
8.0
4.0
2.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
10.0
8.0
6.0
4.0
2.0
V
DD
T
= 2V,
V
DD
T
V,
5
=2
o
C
=5
= 25
o
C
0
4
8
12
16
20
V
DD
, OPERATING VOLTAGE (V)
f
osc
, CRYSTAL OSCILLATOR FREQUENCY (MHz)
FIGURE 1E. TYPICAL CRYSTAL OSCILLATOR OPERATING
FREQUENCIES vs OPERATING VOLTAGE, V
DD
AT
25
o
C
FIGURE 1F. TYPICAL SUPPLY CURRENT vs
OPERATING FREQUENCY AT 25
o
C
5
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