HY62UF8200/ HY62QF8200/ HY62EF8200/
HY62SF8200 Series
256Kx8bit full CMOS SRAM
DESCRIPTION
The HY62UF8200 / HY62QF8200 / HY62EF8200
/ HY62SF8200 is a high speed, super low power
and 2M bit full CMOS SRAM organized as
262,144 words by 8bits. The HY62UF8200 /
HY62QF8200 / HY62EF8200 / HY62SF8200 uses
high performance full CMOS process technology
and is designed for high speed and low power
circuit technology. It is particularly well-suited for
the high density low power system application.
This device has a data retention mode that
guarantees data to remain valid at a minimum
power supply voltage of 1.5V.
FEATURES
•
Fully static operation and Tri-state output
•
TTL compatible inputs and outputs
•
Battery backup(LL/SL-part)
- 1.5V(min) data retention
•
Standard pin configuration
- 48ball uBGA
Product
Voltage
Speed
Operation
Standby Current(uA)
No.
(V)
(ns)
Current(mA)
LL
SL
HY62UF8200
3.0
70/85/100
10
10
2
HY62UF8200-I
3.0
70/85/100
10
10
2
HY62QF8200
2.5
85/100/120
5
10
2
HY62QF8200-I
2.5
85/100/120
5
10
2
HY62EF8200
2.0
100/120/150
5
10
2
HY62EF8200-I
2.0
100/120/150
5
10
2
HY62SF8200
1.8
120/150/200
5
10
2
HY62SF8200-I
1.8
120/150/200
5
10
2
Note 1. E.T. : Extended Temperature, Normal : Normal Temperature
2. Current value is max.
Temperature
(°C)
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
PIN CONNECTION
( Top View )
A0
A1
CS2 A3
/WE A4
NC
A5
A6
A7
A8
IO1
IO2
Vcc
Vss
NC
A17
IO3
A
1
7
BLOCK DIAGRAM
SENSE AMP
A0
ADD INPUT BUFFER
COLUMN DECODER
ROW DECODER
I/O1
OUTPUT BUFFER
I/O8
IO5 A2
IO6
Vss
Vcc
IO7
CS2
A9
A10 A11 A12 A13 A14
/WE
/OE
PIN DESCRIPTION
Pin Name
/CS1
CS2
/WE
/OE
Pin Function
Chip Select 1
Chip Select 2
Write Enable
Output Enable
Pin Name
A0 ~ A17
I/O1 ~ I/O8
Vcc
Vss
Pin Function
Address Input
Data Input/Output
Power(3.0V, 2.5V, 2.0V or 1.8V)
Ground
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.04 /Feb. 99
Hyundai Semiconductor
CONTROL
LOGIC
IO8 /OE /CS1 A16 A15 IO4
/CS1
WRITE DRIVER
MEMORY ARRAY
2048x1024
HY62UF8200/HY62QF8200/HY62EF8200/HY62SF8200 Series
ORDERING INFORMATION
Part No.
HY62UF8200LLM
HY62UF8200SLM
HY62UF8200LLM-I
HY62UF8200SLM-I
HY62QF8200LLM
HY62QF8200SLM
HY62QF8200LLM-I
HY62QF8200SLM-I
HY62EF8200LLM
HY62EF8200SLM
HY62EF8200LLM-I
HY62EF8200SLM-I
HY62SF8200LLM
HY62SF8200SLM
HY62SF8200LLM-I
HY62SF8200SLM-I
Speed
70/85/100
70/85/100
70/85/100
70/85/100
85/100/120
85/100/120
85/100/120
85/100/120
100/120/150
100/120/150
100/120/150
100/120/150
120/150/200
120/150/200
120/150/200
120/150/200
Power
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
LL-part
SL-part
Temp.
Package
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
uBGA
E.T.
E.T.
E.T.
E.T.
E.T.
E.T.
E.T.
E.T.
Note 1. E.T. : Extended Temperature, Blank : Normal Temperature
ABSOLUTE MAXIMUM RATING (1)
Symbol
V
IN,
V
OUT
Vcc
T
A
Parameter
Input/Output Voltage
Power Supply
Operating Temperature
Rating
-0.2 to 3.6
-0.2 to 4.0
0 to 70
Unit
V
V
°C
Remark
-40 to 85
°C
HY62UF8200
HY62QF8200
HY62EF8200
HY62SF8200
HY62UF8200-I
HY62QF8200-I
HY62EF8200-I
HY62SF8200-I
T
STG
P
D
T
SOLDER
Storage Temperature
Power Dissipation
Lead Soldering Temperature & Time
-55 to 150
1.0
260
•
5
°C
W
°C•sec
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
Rev.04 /Feb.99
2
HY62UF8200/HY62QF8200/HY62EF8200/HY62SF8200 Series
RECOMMENDED DC OPERATING CONDITION
Symbol
Vcc
Parameter
Supply Voltage
Product
HY62UF8200-(I)
HY62QF8200-(I)
HY62EF8200-(I)
HY62SF8200-(I)
HY62UF8200-(I)
HY62QF8200-(I)
HY62EF8200-(I)
HY62SF8200-(I)
HY62UF8200-(I)
HY62QF8200-(I)
HY62EF8200-(I)
HY62SF8200-(I)
HY62UF8200-(I)
HY62QF8200-(I)
HY62EF8200-(I)
HY62SF8200-(I)
Min.
2.7
2.2
1.8
1.6
0
Typ.
3.0
2.5
2.0
1.8
0
Max.
3.3
2.8
2.2
2.0
0
Unit
V
V
V
V
Vss
Ground
V
IH
Input High Voltage
V
IL
Input Low Voltage
2.2
2.0
1.6
1.4
-0.2
(1)
-
-
-
-
Vcc+0.2
Vcc+0.2
Vcc+0.2
Vcc+0.2
0.4
V
V
V
V
V
Note : 1. VIL = -1.5V for pulse width less than 30ns
TRUTH TABLE
/CS1
H
X
L
L
L
CS2
X
L
H
H
H
/WE
X
X
H
H
L
/OE
X
X
H
L
X
MODE
Standby
Output Disabled
Read
Write
I/O OPERATION
High-Z
High-Z
Data Out
Data In
Supply Current
Isb, Isb1
Icc
Icc
Icc
Note :
1. H=V
IH
, L=V
IL
, X=don't care
Rev.04 /Feb.99
3
HY62UF8200/HY62QF8200/HY62EF8200/HY62SF8200 Series
DC ELECTRICAL CHARACTERISTICS
Vcc = 3.0V±10%/2.5V±10%/2.0V±10%/1.8V±10%, T
A
= 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.)
Sym
Parameter
Test Condition
Min.
Typ.
Max.
I
LI
Input Leakage Current
Vss < V
IN
< Vcc
-1
-
1
I
LO
Output Leakage Current
Vss < V
OUT
< Vcc, /CS1 = V
IH
or
-1
-
1
CS2 = V
IL
or
/
OE
=
V
IH
or /WE = V
IL
Icc
Operating Power Supply
/CS1 = V
IL
,
Vcc = 3.0V
-
5
10
Current
CS2 = V
IH,
V
IN
= V
IH
or V
IL,
Vcc = 2.5V/2V/
-
3
5
I
I/O =
0mA
1.8V
I
CC1
Average
HY62UF8200-(I) /CS1 = V
IL
CS2 = V
IH,
-
-
55
Operating HY62QF8200-(I) Min Duty Cycle = 100%, I
I/O =
0mA
-
-
40
Current
HY62EF8200-(I)
-
-
25
HY62SF8200-(I)
-
-
20
I
SB
TTL
HY62UF8200-(I) /CS1 = V
IH
or CS2 = V
IL
-
-
0.5
Standby
HY62QF8200-(I)
-
-
0.3
Current
HY62EF8200-(I)
-
-
0.3
(TTL Input)
HY62SF8200-(I)
-
-
0.3
I
SB1
Standby Current
/CS1 > Vcc - 0.2V,
SL
-
0.05
2
(CMOS Input)
CS2 > Vcc - 0.2V or
LL
-
-
10
CS2 < 0.2V
V
OL
Output Low Voltage
Vcc = 3.0V
I
OL
= 2.1mA
-
-
0.4
Vcc = 2.5V
I
OL
= 0.5mA
Vcc = 2.0V
I
OL
= 0.33mA
Vcc = 1.8V
I
OL
= 0.26mA
V
OH
Output
HY62UF8200-(I) Vcc = 3.0V
I
OH =
-1.0mA
2.2
-
-
High
HY62QF8200-(I) Vcc = 2.5V
I
OH =
-0.5mA
2.0
-
-
Voltage
HY62EF8200-(I) Vcc = 2.0V
I
OH =
-0.44mA
1.6
-
-
HY62SF8200-(I) Vcc = 1.8V
I
OH =
-0.44mA
1.4
-
-
Note : Typical values are at Vcc = 3.0V/2.5V/2.0V/1.8V, T
A
= 25°C
Unit
uA
uA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
uA
uA
V
V
V
V
V
Rev.04 /Feb.99
4
HY62UF8200/HY62QF8200/HY62EF8200/HY62SF8200 Series
AC CHARACTERISTICS
Vcc = 3.0V±10%, T
A
= 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.), unless otherwise specified
-70
-85
-10
# Symbol
Parameter
Min.
Max. Min.
Max. Min
Max.
READ CYCLE
1
tRC
Read Cycle Time
70
-
85
-
100
-
2
tAA
Address Access Time
-
70
-
85
-
100
3
tACS
Chip Select Access Time
-
70
-
85
-
100
4
tOE
Output Enable to Output Valid
-
40
-
45
-
50
5
tCLZ
Chip Select to Output in Low Z
10
-
10
-
20
-
6
tOLZ
Output Enable to Output in Low Z
5
-
5
-
5
-
7
tCHZ
Chip Deselection to Output in High Z
0
30
0
30
0
30
8
tOHZ
Out Disable to Output in High Z
0
30
0
30
0
30
9
tOH
Output Hold from Address Change
10
-
10
-
15
-
WRITE CYCLE
10 tWC
Write Cycle Time
70
-
85
-
100
-
11 tCW
Chip Selection to End of Write
60
-
70
-
80
-
12 tAW
Address Valid to End of Write
60
-
70
-
80
-
13 tAS
Address Set-up Time
0
-
0
-
0
-
14 tWP
Write Pulse Width
50
-
55
-
75
-
15 tWR
Write Recovery Time
0
-
0
-
0
-
16 tWHZ
Write to Output in High Z
0
25
0
30
0
35
17 tDW
Data to Write Time Overlap
30
-
35
-
45
-
18 tDH
Data Hold from Write Time
0
-
0
-
0
-
19 tOW
Output Active from End of Write
5
-
5
-
10
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Vcc = 2.5V±10%, T
A
= 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.), unless otherwise specified
-85
-10
-12
# Symbol
Parameter
Min.
Max. Min.
Max. Min
Max.
READ CYCLE
1
tRC
Read Cycle Time
85
-
100
-
120
-
2
tAA
Address Access Time
-
85
-
100
-
120
3
tACS
Chip Select Access Time
-
85
-
100
-
120
4
tOE
Output Enable to Output Valid
-
45
-
50
-
60
5
tCLZ
Chip Select to Output in Low Z
10
-
20
-
20
-
6
tOLZ
Output Enable to Output in Low Z
5
-
5
-
10
-
7
tCHZ
Chip Deselection to Output in High Z
0
30
0
30
0
40
8
tOHZ
Out Disable to Output in High Z
0
30
0
30
0
40
9
tOH
Output Hold from Address Change
10
-
15
-
15
-
WRITE CYCLE
10 tWC
Write Cycle Time
85
-
100
-
120
-
11 tCW
Chip Selection to End of Write
70
-
80
-
100
-
12 tAW
Address Valid to End of Write
70
-
80
-
100
-
13 tAS
Address Set-up Time
0
-
0
-
0
-
14 tWP
Write Pulse Width
55
-
75
-
85
-
15 tWR
Write Recovery Time
0
-
0
-
0
-
16 tWHZ
Write to Output in High Z
0
30
0
35
0
40
17 tDW
Data to Write Time Overlap
35
-
45
-
50
-
18 tDH
Data Hold from Write Time
0
-
0
-
0
-
19 tOW
Output Active from End of Write
5
-
10
-
10
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev.04 /Feb.99
5
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