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MT48LC32M8A2TG-6A

产品描述Synchronous DRAM, 32MX8, 5.4ns, CMOS, PDSO54, 0.400 INCH, TSOP2-54
产品类别存储    存储   
文件大小2MB,共92页
制造商Micron Technology
官网地址http://www.mdtic.com.tw/
下载文档 详细参数 全文预览

MT48LC32M8A2TG-6A概述

Synchronous DRAM, 32MX8, 5.4ns, CMOS, PDSO54, 0.400 INCH, TSOP2-54

MT48LC32M8A2TG-6A规格参数

参数名称属性值
是否无铅含铅
是否Rohs认证不符合
厂商名称Micron Technology
零件包装代码TSOP2
包装说明TSOP2, TSOP54,.46,32
针数54
Reach Compliance Codenot_compliant
ECCN代码EAR99
Is SamacsysN
访问模式FOUR BANK PAGE BURST
最长访问时间5.4 ns
其他特性AUTO/SELF REFRESH
最大时钟频率 (fCLK)167 MHz
I/O 类型COMMON
交错的突发长度1,2,4,8
JESD-30 代码R-PDSO-G54
JESD-609代码e0
长度22.22 mm
内存密度268435456 bit
内存集成电路类型SYNCHRONOUS DRAM
内存宽度8
功能数量1
端口数量1
端子数量54
字数33554432 words
字数代码32000000
工作模式SYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织32MX8
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码TSOP2
封装等效代码TSOP54,.46,32
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度)235
电源3.3 V
认证状态Not Qualified
刷新周期8192
座面最大高度1.2 mm
自我刷新YES
连续突发长度1,2,4,8,FP
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)3 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层Tin/Lead (Sn/Pb)
端子形式GULL WING
端子节距0.8 mm
端子位置DUAL
处于峰值回流温度下的最长时间30
宽度10.16 mm
Base Number Matches1

文档预览

下载PDF文档
256Mb: x4, x8, x16 SDRAM
Features
SDR SDRAM
MT48LC64M4A2 – 16 Meg x 4 x 4 banks
MT48LC32M8A2 – 8 Meg x 8 x 4 banks
MT48LC16M16A2 – 4 Meg x 16 x 4 banks
Features
PC100- and PC133-compliant
Fully synchronous; all signals registered on positive
edge of system clock
Internal, pipelined operation; column address can
be changed every clock cycle
Internal banks for hiding row access/precharge
Programmable burst lengths: 1, 2, 4, 8, or full page
Auto precharge, includes concurrent auto pre-
charge and auto refresh modes
Self refresh mode (not available on AT devices)
Auto refresh
64ms, 8192-cycle (commercial and industrial)
16ms, 8192-cycle (automotive)
LVTTL-compatible inputs and outputs
Single +3.3V ±0.3V power supply
Table 1: Address Table
Parameter
Configuration
Refresh count
Row addressing
Bank addressing
Column
addressing
64 Meg x 4 32 Meg x 8
16 Meg x 4
x 4 banks
8K
8K A[12:0]
4 BA[1:0]
2K A[9:0],
A11
8 Meg x 8 x
4 banks
8K
8K A[12:0]
4 BA[1:0]
1K A[9:0]
16 Meg
x 16
4 Meg x 16
x 4 banks
8K
8K A[12:0]
4 BA[1:0]
512 A[8:0]
Options
Configurations
64 Meg x 4 (16 Meg x 4 x 4 banks)
32 Meg x 8 (8 Meg x 8 x 4 banks)
16 Meg x 16 (4 Meg x 16 x 4 banks)
Write recovery (
t
WR)
t
WR = 2 CLK
1
Plastic package – OCPL
2
54-pin TSOP II OCPL
2
(400 mil)
(standard)
54-pin TSOP II OCPL
2
(400 mil)
Pb-free
60-ball FBGA (x4, x8) (8mm x 16mm)
60-ball FBGA (x4, x8) (8mm x 16mm)
Pb-free
54-ball VFBGA (x16) (8mm x 14 mm)
54-ball VFBGA (x16) (8mm x 14 mm)
Pb-free
Timing – cycle time
6ns @ CL = 3 (x8, x16 only)
7.5ns @ CL = 3 (PC133)
7.5ns @ CL = 2 (PC133)
Self refresh
Standard
Low power
Operating temperature range
Commercial (0˚C to +70˚C)
Industrial (–40˚C to +85˚C)
Automotive (–40˚C to +105˚C)
Revision
Notes:
Marking
64M4
32M8
16M16
A2
TG
P
FB
BB
FG
BG
-6A
-75
-7E
None
L
3
None
IT
AT
3
:D
Table 2: Key Timing Parameters
CL = CAS (READ) latency
Speed
Grade
-6A
-7E
-75
-7E
-75
Clock
Frequency
167 MHz
143 MHz
133 MHz
133 MHz
100 MHz
Setup
CL = 2 CL = 3 Time
5.4ns
6ns
5.4ns
5.4ns
5.4ns
1.5ns
1.5ns
1.5ns
1.5ns
1.5ns
Access Time
Hold
Time
0.8ns
0.8ns
0.8ns
0.8ns
0.8ns
1. See Micron technical note TN-48-05 on
Micron's Web site.
2. Off-center parting line.
3. Contact Micron for availability.
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
1999 Micron Technology, Inc. All rights reserved.

 
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