LT3460
1.3MHz Step-Up DC/DC
Converter in SC70 and ThinSOT
FEATURES
s
s
s
s
s
s
s
s
s
DESCRIPTIO
1.3MHz Switching Frequency
High Output Voltage: Up to 36V
300mA Integrated Switch
12V at 70mA from 5V Input
5V at 60mA from 3.3V Input
Wide Input Range: 2.5V to 16V
Uses Small Surface Mount Components
Low Shutdown Current: <1µA
Low Profile (1mm) SC70 and SOT-23 (ThinSOT
TM
)
Packages
The LT
®
3460 is a general purpose step-up DC/DC con-
verter. The LT3460 switches at 1.3MHz, allowing the use
of tiny, low cost and low height capacitors and inductors.
The constant frequency results in low, predictable output
noise that is easy to filter.
The high voltage switch in the LT3460 is rated at 38V,
making the device ideal for boost converters up to 36V.
The LT3460 can generate 12V at up to 70mA from a 5V
supply.
The LT3460 is available in SC70 and SOT-23 packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation
APPLICATIO S
s
s
s
s
s
s
s
Digital Cameras
CCD Bias Supply
XDSL Power Supply
TFT-LCD Bias Supply
Local 5V or 12V Supply
Medical Diagnostic Equipment
Battery Backup
TYPICAL APPLICATIO
90
85
EFFICIENCY (%)
80
75
70
65
60
5V to 12V, 70mA Step-Up DC/DC Converter
V
IN
5V
4.7µF
V
IN
LT3460
OFF ON
SHDN
GND
FB
15k
1µF
22µH
V
OUT
12V
70mA
SW
130k
22pF
0
3460 F01
V
SW
5V/DIV
I
L
100mA/DIV
U
Efficiency
20
40
60
LOAD CURRENT (mA)
80
3460 F01a
U
U
Switching Waveforms
0.2µs/DIV
3460 F01b
3460f
1
LT3460
ABSOLUTE
AXI U RATI GS
Input Voltage (V
IN
) .................................................. 16V
SW Voltage .............................................................. 38V
FB Voltage ................................................................. 5V
SHDN Voltage .......................................................... 16V
PACKAGE/ORDER I FOR ATIO
TOP VIEW
SW 1
GND 2
FB 3
4 SHDN
5 V
IN
ORDER PART
NUMBER
TOP VIEW
LT3460ES5
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
T
JMAX
= 125°C,
θ
JA
= 256°C/W IN FREE AIR
θ
JA
= 120°C ON BOARD OVER
GROUND PLANE
S5 PART MARKING
LTB1
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C, V
IN
= 3V, V
SHDN
= 3V, unless otherwise noted.
PARAMETER
Minimum Operating Voltage
Maximum Operating Voltage
Feedback Voltage
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
Feedback Line Regulation
FB Pin Bias Current
Supply Current
2.5V < V
IN
< 16V
q
SHDN = 0V
Switching Frequency
Maximum Duty Cycle
Switch Current Limit
Switch V
CESAT
Switch Leakage Current
SHDN Voltage High
SHDN Voltage Low
SHDN Pin Bias Current
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
I
SW
= 250mA
V
SW
= 5V
1.5
1.0
85
300
2
U
U
W
W W
U
W
(Note 1)
Operating Ambient
Temperature Range (Note 2) .................. – 40°C to 85°C
Maximum Junction Temperature .......................... 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
SW 1
GND 2
FB 3
6 V
IN
5 GND
4 SHDN
LT3460ESC6
SC6 PACKAGE
6-LEAD PLASTIC SC70
T
JMAX
= 125°C,
θ
JA
= 400°C/W IN FREE AIR
θ
JA
= 270°C/W ON BOARD OVER GROUND
PLANE
SC6 PART MARKING
LAAF
MIN
2.5
TYP
MAX
16
UNITS
V
V
V
V
%/V
nA
mA
µA
MHz
%
mA
mV
µA
V
V
µA
1.235
1.225
5
1.255
0.015
25
2.0
0.1
1.3
90
420
320
0.01
1.275
1.280
80
3.0
0.5
1.7
600
450
1
0.4
40
Note 2:
The LT3460E is guaranteed to meet specifications from 0°C to
70°C. Specifications over the –40°C to 85°C operating temperature range
are assured by design, characterization and correlation with statistical
process controls.
3460f
LT3460
TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current
2.5
–50°C
SWITCHING FREQUENCY (MHz)
2.0
25°C
100°C
SHDN PIN BIAS CURRENT (µA)
IQ (mA)
1.5
1.0
0.5
0
0
5
V
IN
(V)
3460 G01
10
Feedback Bias Current
30
FEEDBACK BIAS CURRENT (nA)
1.260
25
1.255
20
15
10
1.245
VFB (V)
5
0
–50
1.240
–50
Switch Saturation Voltage
(V
CESAT
)
400
350
300
I
C
= 250mA
CURRENT LIMIT (mA)
V
CESAT
(mV)
250
200
150
100
50
0
–50
U W
15
Switching Frequency
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–50
400
350
300
250
200
150
100
50
–25
50
25
0
TEMPERATURE (°C)
75
100
3460 G02
SHDN Pin Bias Current
SHDN = 16V
SHDN = 3V
–25
50
25
0
TEMPERATURE (°C)
75
100
3460 G03
0
–50
Feedback Voltage
1.250
–25
50
25
0
TEMPERATURE (°C)
75
100
3460 G04
–25
50
25
0
TEMPERATURE (°C)
75
100
3460 G05
Current Limit vs Duty Cycle
450
400
350
300
250
200
150
100
50
0
I
C
= 200mA
I
C
= 100mA
–25
50
25
0
TEMPERATURE (°C)
75
100
3460 G06
0
0.2
0.6
0.4
DUTY CYCLE
0.8
1.0
3460 G07
3460f
3
LT3460
PI FU CTIO S
SW (Pin 1/Pin 1):
Switch Pin. Connect inductor/diode
here. Minimize trace at this pin to reduce EMI.
GND (Pin 2/Pins 2 and 5):
Ground Pin. Tie directly to local
ground plane.
FB (Pin 3/Pin 3):
Feedback Pin. Reference
voltage is 1.255V. Connect resistor divider tap here.
Minimize trace area at FB. Set V
OUT
according to
V
OUT
= 1.255V (1 + R1/R2).
BLOCK DIAGRA
V
IN
(PIN 6 SC70 PACKAGE) 5
V
OUT
R1 (EXTERNAL)
FB
R2 (EXTERNAL)
1.255V
REFERENCE
SHUTDOWN
R
S
(EXTERNAL)
4 SHDN
C
S
(EXTERNAL)
R
S
, C
S
OPTIONAL SOFT-START COMPONENTS
OPERATIO
The LT3460 uses a constant frequency, current mode
control scheme to provide excellent line and load regula-
tion. Operation can be best understood by referring to the
block diagram in Figure 1. At the start of each oscillator
cycle, the SR latch is set, which turns on the power switch
Q1. A voltage proportional to the switch current is added
to a stabilizing ramp and the resulting sum is fed into the
positive terminal of the PWM comparator A2. When this
voltage exceeds the level at the negative input of A2, the SR
4
W
U
U
U
U
(ThinSOT/SC70 Packages)
SHDN (Pin 4/Pin 4):
Shutdown Pin. Tie to 1.5V or higher
to enable device; 0.4V or less to disable device. Also
functions as soft-start. Use RC filter (47k, 47nF typ) as
shown in Figure 1.
V
IN
(Pin 5/Pin 6):
Input Supply Pin. Must be locally
bypassed.
+
A1
COMPARATOR
1
DRIVER
SW
–
R
C
C
C
A2
R
S
Q
–
3 FB
Q1
+
∑
+
0.1Ω
–
RAMP
GENERATOR
1.3MHz
OSCILLATOR
2
GND
(PINS 2 AND 5 SC70 PACKAGE)
3460 BD
Figure 1. Block Diagram
latch is reset turning off the power switch. The level at the
negative input of A2 is set by the error amplifier A1, and is
simply an amplified version of the difference between the
feedback voltage and the reference voltage of 1.255V. In
this manner, the error amplifier sets the correct peak
current level to keep the output in regulation. If the error
amplifier’s output increases, more current is delivered to
the output; if it decreases, less current is delivered.
3460f
LT3460
OPERATIO
Feedback Loop Compensation
The LT3460 has an internal feedback compensation net-
work as shown in Figure 1 (R
C
and C
C
). However, because
the small signal characteristics of a boost converter change
with operation conditions, the internal compensation net-
work cannot satisfy all applications. A properly designed
external feed forward capacitor from V
OUT
to FB (C
F
in
Figure 2) will correct the loop compensation for most
applications.
V
IN
5V
C1
4.7µF
OFF ON
4
L1
22µH
5
V
IN
LT3460
SHDN
GND
2
C1: TAIYO YUDEN X5R JMK212BJ475KG
C2: TAIYO YUDEN X5R EMK316BJ105
D1: CENTRAL SEMICONDUCTOR CMDSH2-3
L1: MURATA LQH32CN-220 OR EQUIVALENT
FB
3
R1
15k
C2
1µF
1
SW
D1
V
OUT
12V
70mA
GAIN (dB)
Figure 2. 5V to 12V Step-Up Converter
The LT3460 uses peak current mode control. The current
feedback makes the inductor very similar to a current
source in the medium frequency range. The power stage
transfer function in the medium frequency range can be
approximated as:
G
P(s )
=
K1
,
s • C2
where C2 is the output capacitance, and K1 is a constant
based on the operating point of the converter. In continu-
ous current mode, K1 increases as the duty cycle de-
creases.
The internal compensation network R
C
, C
C
can be approxi-
mated as follows in medium frequency range:
G
C(s )
=
K2 •
The zero
s • R
C
• C
C
+
1
s • C
C
f
Z
=
1
2 •
π
• R
C
• C
C
U
is about 70kHz.
The feedback loop gain T(s) = K3 • G
P
(s) • G
C
(s). If it
crosses over 0dB far before f
Z
, the phase margin will be
small. Figure 3 is the Bode plot of the feedback loop gain
measured from the converter shown in Figure 2 without
the feedforward capacitor C
F
. The result agrees with
the previous discussion: Phase margin of about 20° is
insufficient.
60
50
40
30
20
10
0
–10
–20
–30
–40
3460 F02
90
GAIN
45
0
–45
R2
130k
C
F
22pF
PHASE (DEG)
–90
PHASE
–135
–180
–225
–270
–315
1
10
100
FREQUENCY (kHz)
–360
1000
3460 F03
Figure 3
In order to improve the phase margin, a feed-forward
capacitor C
F
in Figure 2 can be used.
Without the feed-forward capacitor, the transfer function
from V
OUT
to FB is:
FB
R1
=
V
OUT
R1
+
R2
With the feed-forward capacitor C
F
, the transfer function
becomes:
FB
R1
s • R2 • C
F
+
1
•
=
V
OUT
R1
+
R2 s • R1 • R2 • C
+
1
F
R1
+
R2
The feed-forward capacitor C
F
generates a zero and a pole.
The zero always appears before the pole. The frequency
distance between the zero and the pole is determined only
by the ratio between V
OUT
and FB. To give maximum phase
3460f
5
PCB设计
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