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MX29LV400CTMI-55Q

产品描述4M X 16 FLASH 3V PROM, 70 ns, PBGA48
产品类别存储   
文件大小903KB,共68页
制造商Macronix
官网地址http://www.macronix.com/en-us/Pages/default.aspx
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MX29LV400CTMI-55Q概述

4M X 16 FLASH 3V PROM, 70 ns, PBGA48

4M × 16 FLASH 3V 可编程只读存储器, 70 ns, PBGA48

MX29LV400CTMI-55Q规格参数

参数名称属性值
功能数量1
端子数量48
最大工作温度85 Cel
最小工作温度-40 Cel
最大供电/工作电压3.6 V
最小供电/工作电压2.7 V
额定供电电压3 V
最大存取时间70 ns
加工封装描述8 X 6 MM, 1.20 MM HEIGHT, ROHS COMPLIANT, MO-120, TFBGA-48
无铅Yes
欧盟RoHS规范Yes
状态ACTIVE
工艺CMOS
包装形状RECTANGULAR
包装尺寸GRID ARRAY, THIN PROFILE, FINE PITCH
表面贴装Yes
端子形式BALL
端子间距0.8000 mm
端子涂层TIN SILVER COPPER
端子位置BOTTOM
包装材料PLASTIC/EPOXY
温度等级INDUSTRIAL
内存宽度16
组织4M X 16
存储密度6.71E7 deg
操作模式ASYNCHRONOUS
位数4.19E6 words
位数4M
备用存储器宽度8
内存IC类型FLASH 3V PROM
串行并行PARALLEL

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MX29LV400C T/B
4M-BIT [512K x 8 / 256K x 16] CMOS SINGLE VOLTAGE
3V ONLY FLASH MEMORY
FEATURES
• Extended single - supply voltage range 2.7V to 3.6V
• 524,288 x 8/262,144 x 16 switchable
• Single power supply operation
- 3.0V only operation for read, erase and program
operation
Fully compatible with MX29LV400T/B device
• Fast access time: 55R/70/90ns
• Low power consumption
- 30mA maximum active current
- 0.2uA typical standby current
• Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Byte x 1,
8K-Byte x 2, 32K-Byte x1, and 64K-Byte x7)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability
- Automatically program and verify data at specified
address
• Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase
• Status Reply
- Data# Polling & Toggle bit for detection of program
and erase operation completion
• Ready/Busy# pin (RY/BY#)
- Provides a hardware method of detecting program or
erase operation completion
• Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotect allows code changes in
previously locked sectors
• CFI (Common Flash Interface) compliant
- Flash device parameters stored on the device and
provide the host system to access
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Package type:
- 44-pin SOP
- 48-pin TSOP
- 48-ball CSP (6 x 8mm)
- 48-ball CSP (4 x 6mm)
-
All Pb-free devices are RoHS Compliant
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
• 20 years data retention
GENERAL DESCRIPTION
The MX29LV400C T/B is a 4-mega bit Flash memory
organized as 512K bytes of 8 bits or 256K words of 16
bits. MXIC's Flash memories offer the most cost-effec-
tive and reliable read/write non-volatile random access
memory. The MX29LV400C T/B is packaged in 44-pin
SOP, 48-pin TSOP and 48-ball CSP. It is designed to be
reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29LV400C T/B offers access time as
fast as 55ns, allowing operation of high-speed micropro-
cessors without wait states. To eliminate bus conten-
tion, the MX29LV400C T/B has separate chip enable
(CE#) and output enable (OE#) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29LV400C T/B uses a command register to manage
this functionality. The command register allows for 100%
P/N:PM1155
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29LV400C T/B uses a 2.7V~3.6V VCC
supply to perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
REV. 1.5, APR. 24, 2006
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