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MX29LV800TTI-70R

产品描述8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
产品类别存储    存储   
文件大小880KB,共60页
制造商Macronix
官网地址http://www.macronix.com/en-us/Pages/default.aspx
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MX29LV800TTI-70R概述

8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY

MX29LV800TTI-70R规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Macronix
零件包装代码TSOP1
包装说明TSOP1, TSSOP48,.8,20
针数48
Reach Compliance Codeunknow
ECCN代码EAR99
最长访问时间70 ns
备用内存宽度8
启动块TOP
命令用户界面YES
数据轮询YES
耐久性100000 Write/Erase Cycles
JESD-30 代码R-PDSO-G48
JESD-609代码e0
长度18.4 mm
内存密度8388608 bi
内存集成电路类型FLASH
内存宽度16
功能数量1
部门数/规模1,2,1,15
端子数量48
字数524288 words
字数代码512000
工作模式ASYNCHRONOUS
最高工作温度85 °C
最低工作温度-40 °C
组织512KX16
封装主体材料PLASTIC/EPOXY
封装代码TSOP1
封装等效代码TSSOP48,.8,20
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE
并行/串行PARALLEL
峰值回流温度(摄氏度)NOT SPECIFIED
电源3.3 V
编程电压3 V
认证状态Not Qualified
就绪/忙碌YES
座面最大高度1.2 mm
部门规模16K,8K,32K,64K
最大待机电流0.000005 A
最大压摆率0.03 mA
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)3 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层TIN LEAD
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
切换位YES
类型NOR TYPE
宽度12 mm

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PRELIMINARY
MX29LV800T/B
8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE
3V ONLY FLASH MEMORY
FEATURES
• Extended single - supply voltage range 2.7V to 3.6V
• 1,048,576 x 8/524,288 x 16 switchable
• Single power supply operation
- 3.0V only operation for read, erase and program
operation
• Fast access time: 70/90ns
• Low power consumption
- 20mA maximum active current
- 0.2uA typical standby current
• Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
• Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase.
• Status Reply
- Data polling & Toggle bit for detection of program and
erase operation completion.
• Ready/Busy pin (RY/BY)
- Provides a hardware method of detecting program or
erase operation completion.
• Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Tempoary sector unprotect allows code changes in
previously locked sectors.
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Low VCC write inhibit is equal to or less than 2.3V
• Package type:
- 44-pin SOP
- 48-pin TSOP
- 48-pin CSP
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
GENERAL DESCRIPTION
The MX29LV800T/B is a 8-mega bit Flash memory or-
ganized as 1M bytes of 8 bits or 512K words of 16 bits.
MXIC's Flash memories offer the most cost-effective
and reliable read/write non-volatile random access
memory. The MX29LV800T/B is packaged in 44-pin
SOP, 48-pin TSOP, and 48-ball CSP. It is designed to be
reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29LV800T/B offers access time as fast
as 70ns, allowing operation of high-speed microproces-
sors without wait states. To eliminate bus contention,
the MX29LV800T/B has separate chip enable (CE) and
output enable (OE) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29LV800T/B uses a command register to manage
this functionality. The command register allows for 100%
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29LV800T/B uses a 2.7V~3.6V VCC sup-
ply to perform the High Reliability Erase and auto Pro-
gram/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
P/N:PM0709
REV. 1.3, JAN. 24, 2002
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