NC7ST08 TinyLogic HST 2-Input AND Gate
January 1997
Revised August 2004
NC7ST08
TinyLogic
HST 2-Input AND Gate
General Description
The NC7ST08 is a single 2-Input high performance CMOS
AND Gate, with TTL-compatible inputs. Advanced Silicon
Gate CMOS fabrication assures high speed and low power
circuit operation. ESD protection diodes inherently guard
both inputs and output with respect to the V
CC
and GND
rails. High gain circuitry offers high noise immunity and
reduced sensitivity to input edge rate. The TTL-compatible
inputs facilitate TTL to NMOS/CMOS interfacing. Device
performance is similar to MM74HCT but with 1/2 the output
current drive of HC/HCT.
Features
s
Space saving SOT23 or SC70 5-lead package
s
Ultra small MicroPak
leadless package
s
High Speed:
t
PD
6 ns (typ), V
CC
=
5V, C
L
=
15 pF, T
A
=
25
°
C
s
Low Quiescent Power, I
CC
<
1
µ
A, V
CC
=
5.5V
s
Balanced Output Drive; 2 mA I
OL
,
−
2 mA I
OH
s
TTL-compatible inputs
Ordering Code:
Order
Number
NC7ST08M5X
NC7ST08P5X
NC7ST08L6X
Package
Number
MA05B
MAA05A
MAC06A
Product Code
Top Mark
8S08
T08
NN
Package Description
5-Lead SOT23, JEDEC MO-178, 1.6mm
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
6-Lead MicroPak, 1.0mm Wide
Supplied As
3k Units on Tape and Reel
3k Units on Tape and Reel
5k Units on Tape and Reel
Logic Symbol
IEEE/IEC
Connection Diagrams
Pin Assignments for SC70 and SOT23
Pin Descriptions
Pin Names
A, B
Y
NC
Description
Inputs
Output
No Connect
Pad Assignment for MicroPak
(Top View)
Function Table
Y
=
AB
Inputs
A
L
L
H
H
H
=
HIGH Logic Level
Output
B
L
H
L
H
Y
L
L
L
H
(Top Thru View)
L
=
LOW Logic Level
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
© 2004 Fairchild Semiconductor Corporation
DS012182
www.fairchildsemi.com
NC7ST08
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
@V
IN
< −
0.5V
@V
IN
≥
V
CC
+
0.5V
DC Input Voltage (V
IN
)
DC Output Diode Current (I
OK
)
V
OUT
< −
0.5V
V
OUT
>
V
CC
+
0.5V
Output Voltage (V
OUT
)
DC Output Source or Sink Current
(I
OUT
)
DC V
CC
or Ground Current per
Supply Pin (I
CC
or I
GND
)
Storage Temperature (T
STG
)
Junction Temperature (T
J
)
Lead Temperature (T
L
);
(Soldering, 10 seconds)
Power Dissipation (P
D
) @
+
85
°
C
SOT23-5
SC70-5
200 mW
150 mW
260
°
C
−
0.5V to
+
7.0V
−
20 mA
+
20 mA
−
0.5V to V
CC
+
0.5V
−
20 mA
+
20 mA
−
0.5V to V
CC
+
0.5V
±
12.5 mA
±
25 mA
−
65
°
C to
+
150
°
C
150
°
C
Recommended Operating
Conditions
(Note 2)
Supply Voltage
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
Operating Temperature (T
A
)
Input Rise and Fall Time (t
r
, t
f
)
V
CC
=
5.0V
Thermal Resistance (
θ
JA
)
SOT23-5
SC70-5
300
°
C/W
425
°
C/W
0 ns to 500 ns
4.5V to 5.5V
0.0V to V
CC
0V to V
CC
−
40
°
C to
+
85
°
C
Note 1:
Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur. The databook specifications should be met,
without exception, to ensure that the system design is reliable over its
power supply, temperature, and output/input loading variables. Fairchild
does not recommend operation of circuits outside the databook specifica-
tions.
Note 2:
Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
V
CC
(V)
4.5–5.5
4.5–5.5
4.5
4.5
V
OL
LOW Level Output Voltage
4.5
4.5
I
IN
I
CC
I
CCT
Input Leakage Current
Quiescent Supply Current
I
CC
per Input
5.5
5.5
5.5
4.4
4.18
4.5
4.35
0
0.10
0.1
0.26
±0.1
1.0
2.0
Min
2.0
0.8
4.4
4.13
0.1
0.33
±1.0
10.0
2.9
V
V
µA
mA
V
T
A
= +25°C
Typ
Max
T
A
=
40°C to
+85°C
Min
2.0
0.8
Max
Units
V
V
I
OH
= −20 µA
I
OH
= −2
mA
V
IN
=
V
IH
I
OL
=
20
µA
I
OL
=
2 mA
V
IN
=
V
IL
0
≤
V
IN
≤
5.5V
V
IN
=
V
CC
or GND
One Input V
IN
=
0.5V or 2.4V,
Other Input V
CC
or GND
Conditions
www.fairchildsemi.com
2
NC7ST08
AC Electrical Characteristics
Symbol
t
PLH
,
t
PHL
4.5
5.5
t
TLH
,
t
THL
C
IN
C
PD
Input Capacitance
Power Dissipation Capacitance
Output Transition Time
5.0
4.5
5.5
Open
5.0
6
Parameter
Propagation Delay
V
CC
(V)
5.0
Min
T
A
= +25°C
Typ
4
6
6
12
5
11
4
11
10
Max
12
17
16
27
14
26
10
25
21
10
31
26
20
31
18
30
ns
ns
pF
pF
(Note 3)
Figure 2
C
L
=
15 pF
C
L
=
50 pF
Figures
1, 3
ns
C
L
=
50 pF
T
A
=
40°C to
+85°C
Min
Max
Units
ns
Conditions
C
L
=
15 pF
Figures
1, 3
Figure
Number
Note 3:
C
PD
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
CCD
) at no output
loading and operating at 50% duty cycle. (See Figure 2.) C
PD
is related to I
CCD
dynamic operating current by the expression:
I
CCD
=
(C
PD
)(V
CC
)(f
IN
)
+
(I
CC
static).
AC Loading and Waveforms
C
L
includes load and stray capacitance
Input PRR
=
1.0 MHz; t
w
=
500 ns
FIGURE 1. AC Test Circuit
FIGURE 3. AC Waveforms
Input
=
AC Waveform; PRR
=
variable; Duty Cycle
=
50%
FIGURE 2. I
CCD
Test Circuit
3
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