NANDrive
SST85LD0128 / SST85LD0256 / SST85LD0512
Advance Information
FEATURES:
• Industry Standard ATA/IDE Bus Interface
– Host Interface: 8- or 16-bit access
– Supports up to PIO Mode-4
– Supports up to Multi-word DMA Mode-2
• Low Power, 3.3V Power Supply
• 5.0V or 3.3V host interface through V
DDQ
pins
• Low current operation:
– Active mode: 80 mA Max.
– Sleep mode: 150 µA Max.
• Power Management Unit
– Immediate disabling of unused circuitry
• Expanded Data Protection
– WP_PD# pin configurable by firmware for
prevention of data overwrites
– Added data security through user-selectable
protection zones
• 20-byte Unique ID for Enhanced Security
– Factory Pre-programmed 10-byte Unique ID
– User-Programmable 10-byte ID
• Integrated Voltage Detector
– Industrial Temperature Device requires external
POR# signal
• Endurance
– Greater than 100,000 cycles with data wear leveling
• Data Retention
– 10 years
• Pre-programmed Embedded Firmware
– Executes industry standard ATA/IDE commands
– Implements dynamic wear-leveling algorithms to
substantially increase the longevity of flash media
– Embedded Flash File System
– Built-in ECC corrects up to 3 random 12-bit
symbols of error per 512-byte sector
• Internal or External System Clock Option
• Capacity Expansion Using External Flash Media
Devices
– Automatic Recognition and Initialization of Flash
Media Devices
– Seamless integration into a standard SMT
manufacturing process
• Multi-tasking Technology enables Fast
Sustained Write Performance (Host to Flash)
– Up to 8 MB/sec without extended NAND Flash
– Up to 10 MB/sec with extended NAND Flash
• Fast Sustained Read Performance (Flash to Host)
– Up to 10 MB/sec
• Commercial and Industrial Temperature Ranges
– 0°C to 70°C for commercial operation
– -40°C to +85°C for industrial operation
• Industry’s smallest 12mm x 18mm LBGA package
• All non-Pb (lead-free) devices are RoHS compliant
PRODUCT DESCRIPTION
The SST85LD0128, SST85LD0256, and SST85LD0512
NANDrive™ integrated circuits (IC) are high-performance,
fully-integrated, embedded flash solid state drives. They
combines an integrated ATA Controller and a 128/256/512
MB NAND Flash die in a multi-chip package. These
products are well suited for solid state mass storage
applications offering new and expanded functionality while
enabling cost effective designs.
The NANDrive provides complete IDE Hard Disk Drive
functionality and compatibility in the industry’s smallest
12mmx18mm BGA package for easy, space saving, and
cost effective mounting to a system motherboard. It is a
perfect solution for portable, consumer and OEM,
electronic products requiring smaller and more reliable data
storage.
The SST85LD0128/0256/0512 NANDrive devices offer
added security protection for confidential information stored
in the flash media. They allow up to four protection zones
which can be set by the user to be Read-only or Hidden
(Read-disabled). The SST85LD0128/0256/0512 accesses
data within the protected zones through a password-
protected command. The NANDrive also provides a
WP_PD# pin to protect critical information stored in the
flash media from unauthorized overwrites.
The NANDrive devices come pre-programmed with a 10-
byte unique serial ID. For even greater system security, the
user has the option of programming an additional 10 Bytes
of ID space to create a unique, 20-byte ID. Additionally, the
capacity of the NANDrive products can be easily expanded
by connecting discrete NAND flash components through
the external Media bus.
ATA-based solid state mass storage technology is widely
used in such products as portable and desktop
computers, digital cameras, music players, handheld
data collection scanners, cellular phones, PCS phones,
PDAs, handy terminals, personal communicators,
advanced two-way pagers, audio recorders, monitoring
devices, and set-top boxes.
SST NANDrive IC supports
standard ATA/IDE protocol with up to PIO Mode-4 and
Multi-word DMA Mode-2 interface.
The NANDrive is a single device, solid state drive that is
designed for embedded systems using standard ATA/IDE
protocol. It has built in microcontroller and file management
firmware that communicates with ATA standard interfaces;
therefore, the device does not require additional or
proprietary software such as Flash File System (FFS) and
Memory Technology Driver (MTD) software.
©2007 Silicon Storage Technology, Inc.
S71319-03-000
2/07
1
The SST logo, NANDrive, and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. Some content is reproduced from the Com-
pactFlash Specification (2.0) by permission of the CompactFlash Association. Other content is reproduced from the ATA/ATAPI-6 (T13/1410D revision
3b) specification by permission of the National Committee for Information Technology Standards. These specifications are subject to change without
NANDrive
SST85LD0128 / SST85LD0256 / SST85LD0512
Advance Information
TABLE OF CONTENTS
FEATURES: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
TABLE OF CONTENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
LIST OF FIGURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
LIST OF TABLES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.0 GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1 Performance-optimized NANDrive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2 NAND Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.0 FUNCTIONAL BLOCKS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.0 PIN ASSIGNMENTS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.0 CAPACITY SPECIFICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.0 EXTERNAL CLOCK INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.0 SECURITY FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.0 CONFIGURABLE WRITE PROTECT/POWER-DOWN MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.1 Write Protect Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.2 Power-down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8.0 POWER-ON INITIALIZATION AND CAPACITY EXPANSION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.1 ATA/IDE Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.2 Serial Communication Interface (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
9.0 LIFETIME EXPECTANCY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
10.0 POWER-ON AND BROWN-OUT RESET CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
11.0 I/O TRANSFER FUNCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
12.0 SOFTWARE INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
12.1 NANDrive Drive Register Set Definitions and Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
12.2 NANDrive Command Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
13.0 ELECTRICAL SPECIFICATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
13.1 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
13.2 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
14.0 APPENDIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
©2007 Silicon Storage Technology, Inc.
S71319-03-000
2/07
2
NANDrive
SST85LD0128 / SST85LD0256 / SST85LD0512
Advance Information
14.1 Differences between the SST NANDrive IC and ATA/ATAPI-5 Specifications . . . . . . . . . . . . . . . . . . 70
15.0 PRODUCT ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
15.1 Valid Combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
16.0 PACKAGING DIAGRAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
LIST OF FIGURES
FIGURE 2-1: NANDrive Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
FIGURE 3-1: Pin Assignments for 91-Ball LBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
FIGURE 10-1: Power-on and Brown-out Reset Timing (Commercial Temperature) . . . . . . . . . . . . . . . . . . 14
FIGURE 10-2: Power-on and Brown-out Reset Timing (Industrial Temperature) . . . . . . . . . . . . . . . . . . . . 14
FIGURE 13-1: AC Input/Output Reference Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
FIGURE 13-2: Host Side Interface I/O Read Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
FIGURE 13-3: Host Side Interface I/O Write Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
FIGURE 13-4: Initiating a Multi-word DMA Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
FIGURE 13-5: Sustaining a Multi-word DMA Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
FIGURE 13-6: Device Terminates a Multi-word DMA Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
FIGURE 13-7: Host Terminates a Multi-word DMA Data Transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
FIGURE 13-8: Media Command Latch Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
FIGURE 13-9: Media Address Latch Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
FIGURE 13-10: Media Data Loading Latch Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
FIGURE 13-11: Media Data Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
FIGURE 16-1: 91-Ball Low Profile Ball Grid Array (LBGA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
©2007 Silicon Storage Technology, Inc.
S71319-03-000
2/07
3
NANDrive
SST85LD0128 / SST85LD0256 / SST85LD0512
Advance Information
LIST OF TABLES
TABLE 3-1: Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
TABLE 4-1: Default NANDrive Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
TABLE 4-2: Sustained Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
TABLE 10-1: Power-on and Brown-out Reset Timing (Commercial Temperature) . . . . . . . . . . . . . . . . . . 14
TABLE 10-2: Power-on and Brown-out Reset Timing (Industrial Temperature) . . . . . . . . . . . . . . . . . . . . 14
TABLE 11-1: I/O Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
TABLE 12-1: Task File Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
TABLE 12-2: NANDrive Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TABLE 12-3: Diagnostic Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
TABLE 12-4: Identify-Drive Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
TABLE 12-5: Extended Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
TABLE 12-6: Security Password Data Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TABLE 12-7: Security Password Data Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
TABLE 12-8: Identifier and Security Level Bit Interaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
TABLE 12-9: Features Supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
TABLE 12-10: Advanced Power Management Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
TABLE 12-11: Transfer Mode Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
TABLE 12-12: Set-Max Features register values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
TABLE 12-13: Set-Max-Set-Password Data Content. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
TABLE 12-14: Translate Sector Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
TABLE 12-15: Error and Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
TABLE 13-1: Absolute Maximum Power Pin Stress Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
TABLE 13-2: Recommended System Power-on Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
TABLE 13-3: Capacitance (Ta = 25°C, f=1 MHz, other pins open) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
TABLE 13-4: Reliability Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
TABLE 13-5: DC Characteristics for Media Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
TABLE 13-6: DC Characteristics for Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
TABLE 13-7: Host Side Interface I/O Read Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
TABLE 13-8: Host Side Interface I/O Write Timing Specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
TABLE 13-9: Multi-word DMA Timing Parameters - Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
TABLE 13-10: External Flash Media Bus Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
TABLE 16-1: Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
©2007 Silicon Storage Technology, Inc.
S71319-03-000
2/07
4
NANDrive
SST85LD0128 / SST85LD0256 / SST85LD0512
Advance Information
1.0 GENERAL DESCRIPTION
The SST85LD0128/0256/0512 devices contain an
integrated ATA Controller and NAND Flash die in a LBGA
package. Refer to Figure 2-1 for the NANDrive block
diagram.
1.1.6 Error Correction Code (ECC)
The NANDrive utilizes 72-bit Reed-Solomon Error
Detection Code (EDC) and Error Correction Code (ECC),
which provides the following error immunity for each 512-
byte block of data:
1. Corrects up to three random 12-bit symbol errors.
2. Corrects single bursts up to 25 bits.
3. Detects single bursts up to 61 bits and double
bursts up to 15 bits.
4. Detects up to six random 12-bit symbol errors.
1.1.7 Serial Communication Interface (SCI)
The Serial Communication Interface (SCI) is designed for
manufacturing error reporting.
1.1.8 Multi-tasking Interface
The multi-tasking interface enables fast, sustained write
performance by allowing concurrent Read, Program, and
Erase operations to multiple flash media devices.
1.1 Performance-optimized NANDrive
The heart of the NANDrive is the ATA Flash Disk Controller
which translates standard ATA signals into flash media data
and control signals. The following components contribute to
the NANDrive’s operation.
1.1.1 Microcontroller Unit (MCU)
The MCU translates ATA/IDE commands into data and
control signals required for flash media operation.
1.1.2 Internal Direct Memory Access (DMA)
The NANDrive uses internal DMA allowing instant data
transfer from buffer to flash media. This implementation
eliminates microcontroller overhead associated with the
traditional, firmware-based approach, thereby increasing
the data transfer rate.
1.1.3 Power Management Unit (PMU)
The power management unit controls the power
consumption of the NANDrive. The PMU dramatically
reduces the power consumption of the NANDrive by
putting the part of the circuitry that is not in operation into
sleep mode.
1.1.4 SRAM Buffer
A key contributor to the NANDrive performance is an
SRAM buffer. The buffer optimizes the host’s data transfer
to and from the flash media.
1.1.5 Embedded Flash File System
The embedded flash file system is an integral part of the
NANDrive. It contains MCU firmware that performs the
following tasks:
1. Translates host side signals into flash media
writes and reads.
2. Provides dynamic flash media wear leveling to
spread the flash writes across all unused memory
address space to increase the longevity of flash
media.
3. Keeps track of data file structures.
4. Manages system security for the selected
protection zones.
1.2 NAND Flash
The SST85LD0128/0256/0512 devices utilize standard
NAND Flash for data storage.
©2007 Silicon Storage Technology, Inc.
S71319-03-000
2/07
5
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