NJW4181
High Voltage Very low current consumption Io=100mA Regulator
GENERAL DESCRIPTION
The NJW4181 is a high input voltage and low current consumption
100mA series regulator low current consumption Iq=9µA and small package.
It has two package lineup. SOT-89 is able to direct replace to
3-terminal 78L series. ESON6, tiny DFN package, corresponds to
a demand on miniaturization of sensor application and so on.
Due to the low current consumption of 9µA, the NJW4181 is suitable
for light load and continuously running applications such as power
management microprocessor, RTC, protection circuit, security system
and so on.
FEATURES
•
Wide Operating Voltage Range
•
Low Current Consumption
•
Correspond to Low ESR capacitor (MLCC)
•
Output Current
•
High Precision Output
•
Internal Thermal Overload Protection
•
Internal Over Current Protection
•
Internal Reverse Current Protection
•
Package Outline
PRODUCT CLASSIFICATION
Device Name
Version
ON/OFF
Function
Yes
Yes
-
-
Package
DFN6-G1(ESON6-G1)
SOT-89-5
DFN6-G1(ESON6-G1)
SOT-89-3
Status
PLAN
PLAN
PACKAGE OUTLINE
NJW4181KG1
NJW4181U3
35V (max.)
9µA (typ.)
I
O
(min.)=100mA
V
O
±1.0%
DFN6-G1(ESON6-G1),
SOT-89-3
NJW4181KG1-xxA
A
NJW4181U2-xxA
A
NJW4181KG1-xxB
B
NJW4181U3-xxB
B
xx=Output Voltage ex) 33=3.3V 05=5.0V
PIN CONFIGURATION
6
5
4
NJW4181
1
2
3
1. N.C.
2. GND
3. N.C.
4. V
IN
5. N.C.
6. V
OUT
1. V
OUT
2. GND
3. V
IN
1
2
3
NJW4181KG1
INPUT VOLTAGE RANGE
V
O
≤3V:
V
IN
= +4.7V to +35V
3V<V
O
≤5V：V
IN
= V
O
+1.7V to +35V
V
O
>5V:
V
IN
= V
O
+2.0V to +35V
NJW4181U3
Ver.2013-04-15
-1-
NJW4181
BLOCK DIAGRAM
OUTPUT VOLTAGE RANK LIST
DFN6-G1(ESON6-G1)
Device Name
NJW4181KG1-25B
NJW4181KG1-33B
NJW4181KG1-05B
NJW4181KG1-08B
NJW4181KG1-15B
SOT-89-3
Device Name
NJW4181U3-25B
NJW4181U3-33B
NJW4181U3-05B
NJW4181U3-08B
NJW4181U3-12B
NJW4181U3-15B
V
OUT
2.5V
3.3V
5.0V
8.0V
15.0V
V
OUT
2.5V
3.3V
5.0V
8.0V
12.0V
15.0V
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYNBOL
Input Voltage
V
IN
Output Voltage
V
OUT
P
D
Tj
Topr
Tstg
Power Dissipation
Junction Temperature
Operating Temperature
Storage Temperature
(Ta=25°C)
RATINGS
UNIT
-0.3 to +40
V
-0.3 ~ V
IN
+7
≤
17 (Vo≤5.0V)
V
-0.3 ~ +17 (Vo>5.0V)
DFN6-G1
420 (*1)
(ESON6-G1)
1200 (*2)
mW
625 (*3)
SOT-89-3
2400 (*4)
-40 to +150
°C
-40 to +85
°C
-40 to +150
°C
(*1): Mounted on glass epoxy board (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 2Layers FR-4, with Exposed Pad)
(*2): Mounted on glass epoxy board (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 4Layers FR-4, with Exposed Pad)
(4Layers: Applying 99.5×99.5mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD51-5)
(*3): Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard size, 2Layers, Cu area 100mm
2
)
(*4): Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard, 4Layers)
(4Layers: Applying 74.2×74.2mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD51-5)
-2-
Ver.2013-04-15
NJW4181
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, V
IN
=Vo+2.3V(3V<V
O
≤5V:
V
IN
= Vo+2.0V, V
O
≤3V:
V
IN
= 5.0V)
C
IN
= 0.1
µF,
C
O
= 2.2µF, Ta= 25°C
PARAMETER
Output Voltage
Quiescent Current
Output Current
Line Regulation
Load Regulation
Average Temperature
Coefficient of
Output Voltage
Sink Current
under
Reverse Current
Protection
operating
Input Voltage
SYMBOL
V
O
I
Q
Io
∆V
O
/∆V
IN
∆V
O
/∆I
O
∆V
O
/∆Ta
I
REVERSE
TEST CONDITION
I
O
=30mA
I
O
=0mA
V
O
×
0.9
V
O
≤3V:
V
IN
= +5.0V to +35V
3V<V
O
≤5V:
V
IN
= V
O
+2.0V to +35V
V
O
>5V:
V
IN
= V
O
+2.3V to +35V,
Io=30mA
I
O
=0mA to 100mA
Ta=0 to 85°C, I
O
=10mA
V
IN
=0V,Vo=5V(V
O
≦5.0V)
V
IN
=0V,Vo=15V(V
O
＞5.0V)
V
O
≤3V
3V<V
O
≤5V
V
O
>5V
4.7
V
O
+1.7
V
O
+2.0
MIN.
-1.0%
-
100
-
-
-
-
TYP.
-
9
-
-
-
±
100
0
100
-
-
-
MAX.
+1.0%
20
-
0.05
0.005
-
1
200
35
35
35
UNIT
V
µA
mA
%/V
%/mA
ppm/°C
µA
V
IN
V
The above specification is a common specification for all output voltages.
Therefore, it may be different from the individual specification for a specific output voltage.
Ver.2013-04-15
-3-
NJW4181
POWER DISSIPATION vs. AMBIENT TEMPERATURE
NJW4181KG1 Power Dissipation
(Topr=-40~+85°C,Tj=150°C)
1400
1200
Power Dissipation PD(mW)
1000
800
600
400
200
0
-50
on 4 layers board
(101.5×114.5×1.6mm)
on 2 layers board
(101.5×114.5×1.6mm)
-25
0
25
50
75
100
Temperature Ta(°C)
NJW4181U3 Power Dissipation
(Topr=-40~+85°C,Tj=150°C)
2500
on 4 layers board
(114.3×76.2×1.6mm)
2000
Power Dissipation PD(mW)
1500
1000
500
on 2 layers board
(114.3×76.2×1.6mm)
0
-50
-25
0
25
50
75
100
Temperature Ta(°C)
-4-
Ver.2013-04-15
NJW4181
TEST CIRCUIT
A
V
IN
I
IN
V
IN
V
OUT
NJW4181-B
0.1µF
GND
2.2µF
(ceramic)
I
OUT
V
V
OUT
TYPICAL APPLICATION
V
IN
V
IN
0.1µF
V
OUT
V
OUT
NJW4181-B
GND
2.2µF
*Input Capacitor C
IN
Input Capacitor C
IN
is required to prevent oscillation and reduce power supply ripple for applications when high
power supply impedance or a long power supply line.
Therefore, use the recommended C
IN
value (refer to conditions of ELECTRIC CHARACTERISTIC) or larger and
should connect between GND and the V
IN
pin as shortest path as possible to avoid the problem.
*Output Capacitor C
O
Output capacitor (C
O
) will be required for a phase compensation of the internal error amplifier.
The capacitance and the equivalent series resistance (ESR) influence to stable operation of the regulator.
Use of a smaller C
O
may cause excess output noise or oscillation of the regulator due to lack of the phase
compensation.
On the other hand, Use of a larger C
O
reduces output noise and ripple output, and also improves output
transient response when rapid load change.
Therefore, use the recommended C
O
value (refer to conditions of ELECTRIC CHARACTERISTIC) or larger
and should connect between GND and the V
OUT
pin as shortest path as possible for stable operation
In addition, you should consider varied characteristics of capacitor (a frequency characteristic, a temperature
characteristic, a DC bias characteristic and so on) and unevenness peculiar to a capacitor supplier enough.
When selecting C
O,
recommend that have withstand voltage margin against output voltage and superior temperature
characteristic.
*Reverse Current Protection
NJW4181 is built-in a Reverse Current Protection. This circuit restrains reverse current from the V
O
pin to the V
IN
pin
when the input voltage is less than the output voltage.
In case of the voltage rank 5.0V or below, reverse voltage differential between output and input should keep V
IN
+7V
or less, to prevent IC breaking due to huge reverse current.
And also, the absolute maximum ratings of the Vo pin (17V) should not be exceeded.
Ver.2013-04-15
-5-
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
