PHE428
Obsolete. See
PHE450
•
LAST ORDER DATE 31 MARCH, 2003.
• Double metallized film pulse capacitor, polypropylene dielectric
L
B
TYPICAL APPLICATIONS
High frequency and high voltage
applications with high current stress, such
as deflection circuits in TV-sets, protection
circuits in SMPS and in electronic ballasts.
CONSTRUCTION
Series winding with polypropylene
dielectric and double metallized polyester
film as electrodes. Encapsulation in self-
extinguishing material meeting the
requirements of UL 94V–0.
H
0.5
p
∅
d
b
l
TECHNICAL DATA
Rated voltage U
R
, VDC
Rated voltage U
R
, VAC
Capacitance range, µF
630
400
0.01–
1.2
1000
500
0.0039–
0.68
1600
630
0.0027–
0.33
2000
650
0.00033–
0.27
2500
p
d
0.4
0.4
0.4
0.5
0.8
0.8
0.8
1.0
std I max I
6
-1
6
-1
6
-1
6
-1
30
30
30
30
b
± 0.4
± 0.4
± 0.4
± 0.7
1000
0.001–
0.15
15.0
22.5
27.5
37.5
±
±
±
±
Capacitance values
Capacitance tolerance
Category
temperature range
Rated temperature
Voltage derating
Climatic category
Insulation resistance
In accordance with IEC E12-series.
±5% standard. Other tolerances on request
–55° C to +105° C
+85° C
The rated voltage is decreased with 1.3% / ° C
between +85° C and +105° C
55/105/56
Measured at 23° C, 100 VDC 60s
Between terminals:
C
≤
0.33 µF: 100 000 MΩ
C > 0.33 µF: 30 000 s
Between terminals and case:
100 000 MΩ
Maximum values at 23
°C
C
≤
0.1 µF
1 kHz
0.03 %
10 kHz
0.04 %
100 kHz
0.15 %
Dissipation factor tanδ
δ
C > 0.1 µF
0.03 %
0.06 %
Inductance
Approximately 6 nH/cm for the total length of capacitor
winding and the leads.
The capacitors can withstand an unlimited number of pulses
with a dU/dt according to the article table. For peak to peak
voltages lower than the rated voltage (U
PP
< U
R
), the specified
dU/dt can be multiplied by U
R
/U
PP
.
Pulse rise time
ENVIRONMENTAL TEST DATA
Vibration
According to IEC 60068-2-6 test Fc. 10–500 Hz for lead space
≤
22.5 mm, 10–55 Hz for lead space 27.5 mm.
6 h with 0.75 mm amplitude or 98 m/s
2
(depending on
frequency) with the capacitor mounted on PCB with the
supporting area in contact with the PCB.
According to IEC 60384-1.
According to IEC 60068-2-29 test Eb. 4000 bumps at 390 m/s
2
with the capacitor mounted on a printed circuit board with
the supporting area in contact with the printed circuit board.
According to IEC 60068-2-3 test Ca, severity 56 days.
Climatic sequence
Bump
Humidity
206
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
