Philips Semiconductors
Product specification
Field and line rate converter with noise
reduction and embedded memory
1
FEATURES
2
GENERAL DESCRIPTION
SAA4998H
•
Motion compensated frame rate upconversion of all 1f
H
film and video standards up to 292 active input lines per
field:
– 50 Hz interlaced to 60 Hz progressive
{(60p mode for LCD and Plasma Display (PDP) TV}
– 50 Hz interlaced to 75 Hz interlaced
{75i mode for jumbo screens, Projection TV (PTV)}
– 50 Hz interlaced to 100 Hz interlaced
(high-end 100 Hz TV)
– 50 Hz interlaced to 50 Hz progressive
(progressive scan TV and LCD and PDP TV)
– 60 Hz interlaced to 60 Hz progressive
(progressive scan TV and LCD and PDP TV)
– 60 Hz interlaced to 90 Hz interlaced
(jumbo screens, PTV)
– 60 Hz interlaced to 120 Hz interlaced
(multistandard high-end 100 Hz TV)
•
480 active lines (NTSC like) or 506 active lines in 50 Hz
interlaced to 60 Hz progressive mode
•
Motion compensated and Edge Dependent
De-Interlacing (EDDI)
(1)
•
Motion estimated film mode detection
•
Motion compensated movie judder cancellation:
– 25 Hz 2 : 2 pull-down (PAL) to 60 Hz progressive or
75 Hz interlaced or 100 Hz interlaced or 50 Hz
progressive
– 30 Hz 2 : 2 pull-down (NTSC) to 60 Hz progressive or
90 Hz interlaced or 120 Hz interlaced
– 24 Hz 3 : 2 pull-down (NTSC) to 60 Hz progressive or
90 Hz interlaced or 120 Hz interlaced
•
Variable vertical sharpness enhancement
•
High quality vertical zoom
•
Motion compensated temporal noise reduction with
after-imaging cancellation
•
Split screen demonstration mode
•
2 Mbaud serial interface (SNERT)
•
Embedded 2
×
2.9-Mbit DRAM
•
Full 8-bit accuracy
•
Memory buffer for Picture-In-Picture (PIP)
•
Lead-free package.
The SAA4998H is a high performance video processor
featuring Natural Motion™
(2)
, for all global TV standards
(PAL, NTSC and SECAM). It is used together with the
picture improvement processor SAA4978H and
SAA4979H.
The SAA4998H is an advanced version of the SAA4993H.
By embedding the field memories it reduces the part count
of the realized concept from 4 to 6 parts to only 2 parts and
reduces the package size from a QFP160 to a QFP100.
The full FALCONIC mode uses full motion estimation and
motion compensation on
1
/
4
pixel accuracy to perform
•
Frame rate upconversion
•
Film mode detection
•
Movie judder cancellation
•
Dynamic Noise Reduction (DNR)
•
Edge Dependent De-Interlacing (EDDI).
The motion compensated de-interlacer is improved with a
new patented Edge Dependent De-Interlacing (EDDI)
method. This avoids jagged edges of diagonal lines. The
better de-interlacer leads to a significant better
performance of progressive as well as interlaced output
formats.
A 60 Hz progressive output frame rate can be generated
for 50 Hz PAL sources to enable the use of 60 Hz LCD or
PDP panels in PAL regions.
50 Hz interlaced to 75 Hz interlaced and 60 Hz interlaced
to 90 Hz interlaced can be generated to achieve an
increased number of lines and hence a reduction of line
visibility for jumbo screens and PTV applications.
The embedded memory can be used to synchronize the
main channel and the 2nd channel for PIP and double
window applications. This avoids to add additional buffer
memory devices to the application.
For demonstration purposes a split screen mode to show
the Dynamic Noise Reduction (DNR) function, natural
motion, and EDDI is available. The estimated motion
vectors can be made visible by colour overlay mode.
The SAA4998H supports a Boundary Scan Test (BST)
circuit in accordance with
“IEEE Std. 1149.1”.
(1) EDDI is protected with two patents of Koninklijke Philips
Electronics N.V.
(2) Natural Motion is a trademark of Koninklijke Philips
Electronics N.V.
2004 Feb 18
3
Philips Semiconductors
Product specification
Field and line rate converter with noise
reduction and embedded memory
2.1
Patent notice
2.2
Latch-up test
SAA4998H
Notice is herewith given that the subject integrated circuit
uses one or more of the following US patents and that
each of these patents may have corresponding patents in
other jurisdictions.
US 4740842, US 5929919, US 6034734, US 5534946,
US 5532750, US 5495300, US 5903680, US 5365280,
US 5148269, US 5072293, US 5771074, and
US 5302909.
3
QUICK REFERENCE DATA
SYMBOL
V
DDD
V
DDA
V
DDM
V
DDS
V
DDE
V
DDP
I
DD
analog supply voltage
field memory supply voltage
SRAM supply voltage
external supply voltage (output pads)
PARAMETER
core supply voltage (internal rail)
Latch-up test in accordance with
“Latch-up Resistance
and Maximum Ratings Test; SNW-FQ-303”;
the
SAA4998H fulfils the requirements.
MIN.
1.65
TYP.
1.8
MAX.
1.95
V
UNIT
3.0
3.3
3.6
V
high supply voltage of internal field memories
sum of supply current
at 1.8 V supply voltage pins
at 3.3 V supply voltage pins
−
−
−
0
180
6
32
−
−
−
33.3
70
mA
mA
MHz
°C
f
CLK
T
amb
4
operating clock frequency
ambient temperature
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
QFP100
DESCRIPTION
plastic quad flat package; 100 leads (lead length 1.95 mm);
body 14
×
20
×
2.8 mm
VERSION
SOT317-2
SAA4998H
2004 Feb 18
4
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