PTN36043A
USB Type-C SuperSpeed active switch
Rev. 1 — 19 February 2018
Product data sheet
1. General description
PTN36043A is a very small, low power 2 differential channel 2-to-1 active
multiplex/demultiplexer switch with integrated SuperSpeed USB 3.1 Gen 1 (also known as
USB 3.0) redriver IC that can switch two differential signals to one of two locations. The
active switch has optimized performance with minimized crosstalk, as required by the
high-speed serial interface for USB Type-C connector. PTN36043A allows expansion of
existing high-speed ports for very low power consumption.
With integrated USB 3.1 Gen 1 redriver, signal quality is enhanced by performing receive
equalization on the deteriorated input signal followed by transmit de-emphasis maximizing
system link performance. With its superior differential signal conditioning and
enhancement capability, the device delivers significant flexibility and performance scaling
for various systems with different PCB characteristics and cable channel conditions and
still benefit from optimum power consumption.
PTN36043A has built-in advanced power management capability that enables significant
power savings under various different USB 3.1 Gen 1 Low-power modes (U2/U3). It can
detect link electrical conditions and can dynamically activate/deactivate internal circuitry
and logic. The device performs these actions without host software intervention and
conserves power.
PTN36043A is powered from a 1.8 V supply and is available in a small DHX2QFN18
package (2.4 mm
2.0 mm
0.35 mm) with 0.4 mm pitch.
2. Features and benefits
2 bidirectional differential channel, 2 : 1 multiplex/demultiplexer switch, supports USB
3.1 Gen 1 specification (SuperSpeed only)
Compliant to SuperSpeed USB 3.1 Gen 1 standard
Pin out data flow matches USB Type-C connector pin assignments
Two control pins for each channel to select optimized signal conditions
Receive equalization on each channel to recover from InterSymbol Interference
(ISI) and high-frequency losses, with provision to choose equalization gain settings
per channel
Transmit de-emphasis on each channel delivers pre-compensation suited to
channel conditions
Output swing adjustment
Integrated termination resistors provide impedance matching on both transmit and
receive sides
Automatic receiver termination detection
Low active power: 203 mW/113 mA (typical) for VDD = 1.8 V
NXP Semiconductors
PTN36043A
USB Type-C SuperSpeed active switch
Power-saving states:
1.35 mW/0.75 mA (typical) when in U2/U3 states
0.81 mW/0.45 mA (typical) when no connection detected
Excellent differential and common return loss performance
14 dB differential and 15 dB common-mode return loss for 10 MHz to 1250 MHz
Flow-through pinout to ease PCB layout and minimize crosstalk effects
Power supply: VDD = 1.8 V (typical)
Compliant with JESD 78 Class II latch up test standard
Very thin DHX2QFN18 package: 2.4 mm x 2.0 mm x 0.35 mm, 0.4 mm pitch
ESD protection exceeds 7000 V HBM per JDS-001-2012 and 1000 V CDM per
JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Operating temperature range:
40°C
to +85°C
3. Applications
USB 3.1 Gen 1 application for USB Type-C connectors
Smart Phones, Tablets/Mobile Devices
Desktop/Notebook Computers
Docking Stations
USB 3.1 Gen 1 Peripherals such as flat panel display, consumer/storage devices,
printers or USB 3.1 Gen 1 capable hubs/repeaters
4. Ordering information
Table 1.
Ordering information
Topside
marking
3A
Package
Name
Description
Version
SOT1442-1
DHX2QFN18 plastic dual in-line compatible thermal enhanced extremely
thin quad flat package; no leads; 18 terminals;
body 2.4 mm
2.0 mm
0.35 mm
Type number
PTN36043ABX
4.1 Ordering options
Table 2.
Ordering options
Orderable
part number
Package
Packing method
Minimum
order
quantity
Temperature
Type number
PTN36043ABX
PTN36043ABXY DHX2QFN18 REEL 13" Q1/T1 *STANDARD 10000
MARK SMD DP
T
amb
=
40 C
to +85
C
PTN36043A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1 — 19 February 2018
2 of 29
NXP Semiconductors
PTN36043A
USB Type-C SuperSpeed active switch
5. Block diagram
V
DD
= 1.8 V
PTN36043A
line
driver
TX_CON_1+
TX_CON_1−
RX
TERMINATION
DETECTION
equalizer
TX_AP_+
TX_AP_−
SIGNAL
DETECTION
EMPHASIS
FILTER
line
driver
TX_CON_2+
TX_CON_2−
line
driver
RX_AP_+
RX_AP_−
RX
TERMINATION
DETECTION
EMPHASIS
FILTER
equalizer
RX_CON_1+
RX_CON_1−
SIGNAL
DETECTION
equalizer
RX_CON_2+
RX_CON_2−
DEVICE CONTROL AND MANAGEMENT
SEL
CH1_SET1
CH1_SET2
CH2_SET1
CH2_SET2
aaa-024283
Fig 1.
Block diagram of PTN36043A
PTN36043A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1 — 19 February 2018
3 of 29
NXP Semiconductors
PTN36043A
USB Type-C SuperSpeed active switch
6. Pinning information
6.1 Pinning
RX_AP_+
TX_AP_+
15
RX_AP_-
TX_AP_-
14
13
12
CH2_SET1
TX_CON_2+
TX_CON_2-
CH2_SET2
11
GND
6
7
8
RX_CON_2-
10
9
RX_CON_2+
18
17
TX_CON_1+
CH1_SET1
RX_CON_1+
RX_CON_1-
CH1_SET2
1
2
PTN36043A
3
4
5
VDD1V8
TX_CON_1-
16
SEL
aaa-024284
Transparent top view
Fig 2.
Pin configuration for DHX2QFN18
6.2 Pin description
Table 3.
Symbol
RX_AP_+
RX_AP_
TX_AP_+
TX_AP_
TX_CON_1+
TX_CON_1
RX_CON_1+
RX_CON_1
TX_CON_2+
TX_CON_2
RX_CON_2+
RX_CON_2
Pin description
Pin
18
17
15
14
6
7
2
3
12
11
9
8
Input
Output
Input
Output
Input
Type
Output
Description
USB 3.1 Gen 1 differential output signals of the RX
path to application processor
USB 3.1 Gen 1 differential input signals of the TX
path from application processor
USB 3.1 Gen 1 differential output signals of the TX
path to connector side port 1
USB 3.1 Gen 1 differential input signals of the RX
path from connector side port 1
USB 3.1 Gen 1 differential output signals of the TX
path to connector side port 2
USB 3.1 Gen 1 differential input signals of the RX
path from connector side port 2
PTN36043A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1 — 19 February 2018
4 of 29
NXP Semiconductors
PTN36043A
USB Type-C SuperSpeed active switch
Pin description
…continued
Pin
16
Type
input
Description
Output selection control
When SEL=0, RX_AP_/TX_AP_ are connected to
RX_CON_2/TX_CON_2, and
RX_CON_1/TX_CON_1 are in high impedance
state.
When SEL=1, RX_AP_/TX_AP_ are connected to
RX_CON_1/TX_CON_1, and
RX_CON_2/TX_CON_2 are in high impedance
state.
Table 3.
Symbol
SEL
CH1_SET1
CH1_SET2
CH2_SET1
CH2_SET2
VDD1V8
GND
1
4
13
10
5
Center
Pad
Ternary
input
Ternary
input
Power
Power
OS/DE/EQ control pins for channel facing the
application processor side
OS/DE/EQ control pins for channel facing the
connector side
Power supply (1.8 V typical)
Ground. Center pad must be connected to GND
plane for both electrical grounding and thermal relief
purposes.
PTN36043A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1 — 19 February 2018
5 of 29
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