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MC10H175
Quint Latch
Description
The MC10H175 is a quint D type latch with common reset and
clock lines. This MECL 10KH part is a functional/pinout duplication
of the standard MECL 10K™ family part, with 100% improvement in
propagation delay and no increase in power−supply current.
Features
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MARKING DIAGRAMS*
16
MC10H175L
AWLYYWW
CDIP−16
L SUFFIX
CASE 620A
1
•
Propagation Delay, 1.2 ns Typical
•
Power Dissipation, 400 mW Typical
•
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
•
Voltage Compensated
•
MECL 10K Compatible
•
Pb−Free Packages are Available*
TRUTH TABLE
D
L
H
X
X
X
X
C0
L
L
H
X
H
X
C1
L
L
X
H
X
H
Reset
X
X
L
L
H
H
Q
n+1
L
H
Qn
Qn
L
L
16
1
PDIP−16
P SUFFIX
CASE 648
1
16
MC10H175P
AWLYYWWG
10H175
ALYWG
DIP
PIN ASSIGNMENT
V
CC1
Q2
Q3
Q4
D4
C0
C1
V
EE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC2
Q1
Q0
D2
D1
RESET
D0
D3
SOEIAJ−16
CASE 966
1 20
20 1
PLLC−20
FN SUFFIX
CASE 775
A
WL, L
YY, Y
WW, W
G
10H175G
AWLYYWW
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional marking information, refer to
Application Note AND8002/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
February, 2006
−
Rev. 7
1
Publication Order Number:
MC10H175/D
MC10H175
Table 1. MAXIMUM RATINGS
Symbol
V
EE
V
I
I
out
T
A
T
stg
Power Supply (V
CC
= 0)
Input Voltage (V
CC
= 0)
Output Current
−
Continuous
−
Surge
Characteristic
Rating
−8.0
to 0
0 to V
EE
50
100
0 to +75
−55
to +150
−55
to +165
Unit
Vdc
Vdc
mA
°C
°C
°C
Operating Temperature Range
Storage Temperature Range
−
Plastic
−
Ceramic
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS
(V
EE
=
−5.2
V
±5%)
(Note 1)
0°
Symbol
I
E
I
inH
Characteristic
Power Supply Current
Input Current High
Pins 5,6,7,9,10,12,13
Pin 11
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
Min
−
−
−
0.5
−1.02
−1.95
−1.17
−1.95
Max
107
565
1120
−
−0.84
−1.63
−0.84
−1.48
Min
−
−
−
0.5
−0.98
−1.95
−1.13
−1.95
25°
Max
97
335
660
−
−0.81
−1.63
−0.81
−1.48
Min
−
−
−
0.3
−0.92
−1.95
−1.07
−1.95
75°
Max
107
335
660
−
−0.735
−1.60
−0.735
−1.45
mA
Vdc
Vdc
Vdc
Vdc
Unit
mA
mA
I
inL
V
OH
V
OL
V
IH
V
IL
1. Each MECL 10H™ series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50
W
resistor to
−2.0
V.
Table 3. AC PARAMETERS
0°
Symbol
t
pd
Characteristic
Propagation Delay
Data
Clock
Reset
Set−up Time
Hold Time
Rise Time
Fall Time
Min
0.6
0.7
1.0
1.5
0.8
0.5
0.5
Max
1.6
1.9
2.2
−
−
1.8
1.8
Min
0.6
0.7
1.0
1.5
0.8
0.5
0.5
25°
Max
1.6
2.0
2.3
−
−
1.9
1.9
Min
0.6
0.8
1.0
1.5
0.8
0.5
0.5
75°
Max
1.7
2.1
2.4
−
−
2.0
2.0
ns
ns
ns
ns
Unit
ns
t
set
t
hold
t
r
t
f
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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2
MC10H175
APPLICATION INFORMATION
The MC10H175 is a high speed, low power quint latch. It
features five D type latches with common reset and a
common two−input clock. Data is transferred on the
negative edge of the clock and latched on the positive edge.
The two clock inputs are “OR”ed together.
Any change on the data input will be reflected at the
outputs while the clock is low. The outputs are latched on the
positive transition of the clock. While the clock is in the high
state, a change in the information present at the data inputs
will not affect the output information.
THE RESET INPUT
IS ENABLED ONLY WHEN THE CLOCK IS IN THE
HIGH STATE.
LOGIC DIAGRAM
D0 10
D
C
R
Q
14 Q0
D1 12
D
C
R
Q
15 Q1
D2 13
D
C
R
Q
2 Q2
D3 9
D
C
R
Q
3 Q3
D4 5
C0 6
C1 7
RESET 11
V
CC1
= PIN 1
V
CC2
= PIN 16
V
EE
= PIN 8
D
C
R
Q
4 Q4
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3
MC10H175
ORDERING INFORMATION
Device
MC10H175FN
MC10H175FNG
MC10H175FNR2
MC10H175FNR2G
MC10H175L
MC10H175M
MC10H175MG
MC10H175P
MC10H175PG
Package
PLLC−20
PLLC−20
(Pb−Free)
PLLC−20
PLLC−20
(Pb−Free)
CDIP−16
SOEIAJ−16
SOEIAJ−16
(Pb−Free)
PDIP−16
PDIP−16
(Pb−Free)
Shipping
†
46 Units / Rail
46 Units / Rail
500 / Tape & Reel
500 / Tape & Reel
25 Unit / Rail
50 Unit / Rail
50 Unit / Rail
25 Unit / Rail
25 Unit / Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
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