FMS6400-1 — Dual-Channel Video Driver with Integrated Filters and Composite Video Summer
October 2009
FMS6400-1
Dual-Channel Video Driver with Integrated Filters and
Composite Video Summer
Features
5.0 MHz 5 -Order Y, C filters with Composite
Summer
Selectable 0dB or 6dB Gain
50dB Stop-Band Attenuation at 27MHz on Y, C,
and CV Outputs
No External Frequency Selection Components or
Clocks
AC-Coupled Inputs
AC-or DC-Coupled Outputs
Continuous Time Low-Pass Filters
0.4% / 0.4° Differential Gain/Phase on Y, C, and
CV Channels
Integrated DC-Restore Circuitry with Low Tilt
Lead (Pb) Free SOIC-8 Package
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Description
The FMS6400-1 is a dual Y/C 5 -order Butterworth low-
pass video filter optimized for minimum overshoot and
flat group delay. The device contains a summing circuit
to generate filtered composite video. In a typical
application, the Y and C input signals from DACs are
AC coupled into the filters. Both channels have DC-
restore circuitry to clamp the DC input levels during
video sync. The Y and C channels use separate
feedback clamps. The clamp pulse is derived from the
Y channel.
All outputs are capable of driving 2V
PP
, AC or DC
coupled, into either a single or dual video load. A single
video load consists of a series-75Ω impedance-
matching resistor connected to a terminated 75Ω line.
This presents a total of 150Ω of loading to the part. A
dual load is two of these in parallel, which presents a
total of 75Ω to the part. The gain of the Y, C, and CV
signals can be selected for 0dB or 6dB with 1V
PP
input
levels. All video channels are clamped during sync to
establish the appropriate output voltage reference
levels.
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Applications
Cable Set-Top Boxes
Satellite Set-Top Boxes
DVD Players
Personal Video Recorders (PVR)
Video On Demand (VOD)
Related Applications Notes
AN-6041 PCB Layout Considerations for Video
Filter / Drivers
Ordering Information
Part Number
FMS64001CS1X
Operating
Temperature Range
0°C to +70°C
Eco
Status
RoHS
Package
8-Lead, Small-Outline Integrated Circuit (SOIC)
Packing
Method
2500 Reel
For Fairchild’s definition of Eco Status, please visit:
http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2004 Fairchild Semiconductor Corporation
FMS6400-1 • Rev. 1.0.1
www.fairchildsemi.com
FMS6400-1 — Dual-Channel Video Driver with Integrated Filters and Composite Video Summer
Block Diagram
CVOUT
Figure 1. Block Diagram
Typical Application Diagram
FMS6400 may also
be DC-Coupled
0.1µF
YIN
75Ω
220µF
YOUT
75Ω
75Ω
CVOUT 6
220µF
To TV
75Ω
0.1µF
CIN
4
CIN
COUT 5
VCC
7
0.1µF
10µF
GND
3
75Ω
220µ
F
COUT
75Ω
75Ω
75Ω
220µ
F
CVOUT
to VCR
1
YIN
F
YOUT 8
User Sets to
logic 0 or
FMS6400-1
2 ASEL
5V
Figure 2. AC-or DC-Coupled Application Diagram
© 2004 Fairchild Semiconductor Corporation
FMS6400-1 • Rev. 1.0.1
www.fairchildsemi.com
2
FMS6400-1 — Dual-Channel Video Driver with Integrated Filters and Composite Video Summer
Pin Configurations
Figure 3. FMS6400 SOIC-8
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
YIN
ASEL
GND
CIN
COUT
CVOUT
VCC
YOUT
Type
Input
Input
Input
Input
Output
Output
Inputs
Output
Description
Liminance (Luma) input. In a typical system, this pin is connected to the
Luma or composite video output pin from the external video encoder.
Channel gain select. “0” = -0dB, “1” = 6dB.
Must be tied to ground.
Chrominance (Chroma) input. In a typical system, this pin is connected to
the Chroma output pin from the external video encoder.
Filtered chrominance video output from the C
IN
channel.
Composite video output. This pin is the sum of Y
OUT
and C
OUT
.
+5V Supply
Filtered luminance output from the Y
IN
channel.
© 2004 Fairchild Semiconductor Corporation
FMS6400-1 • Rev. 1.0.1
www.fairchildsemi.com
3
FMS6400-1 — Dual-Channel Video Driver with Integrated Filters and Composite Video Summer
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IO
I
OUT
DC Supply Voltage
Analog and Digital I/O
Parameter
Min.
-0.3
-0.3
Max.
6.0
V
CC
+0.3
40
Unit
V
V
mA
Output Current Any One Channel, Do Not Exceed
Recommended Operating Conditions
Symbol
T
A
V
CC
Parameter
Operating Temperature Range
Supply Voltage Range
Min.
0
4.75
Typ.
5.00
Max.
+70
5.25
Unit
°C
V
ESD Information
Symbol
ESD
Parameter
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
Value
8
2
Unit
kV
Reliability Information
Symbol
T
J
T
STG
T
L
Θ
JA
Parameter
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10 seconds)
Thermal Resistance
(JEDEC Standard Multi-Layer Test Boards, Still Air)
Min.
-65
Typ.
Max.
+150
+150
300
Unit
°C
°C
°C
°C/W
115
© 2004 Fairchild Semiconductor Corporation
FMS6400-1 • Rev. 1.0.1
www.fairchildsemi.com
4
FMS6400-1 — Dual-Channel Video Driver with Integrated Filters and Composite Video Summer
DC Specifications
T
A
= 25°C, V
CC
= 5.0V, V
IN
= 1V
PP
, ASEL = 1 (6dB gain); all input is AC coupled with 0.1µF; all output is AC coupled
with 220µF into a 150Ω load; referenced to 400kHz, unless otherwise noted.
Symbol
I
CC
V
IN
PSRR
Parameter
Supply Current
(1)
Conditions
No Load
All Channels DC
Min.
Typ.
50
1.4
50
Max.
65
Unit
mA
V
PP
dB
Input Voltage Maximum
Power Supply Rejection Ratio
Note:
1. 100% tested at 25°C.
AC Electrical Specifications
T
A
= 25°C, V
CC
= 5.0V, V
IN
= 1V
PP
, ASEL = 1 (6dB gain); all input is AC coupled with 0.1µF; all output is AC coupled
with 220µF into a 150Ω load; referenced to 400kHz, unless otherwise noted.
Symbol
AV
0dB
AV
6dB
C
SYNC
Y
SYNC
CV
SYNC
t
CLAMP
f
Flat
f
C
f
SB
dG
dP
THD
X
TALK
SNR
t
pd
GD
t
SKEW
t
CLGCV
t
CLDCV
Parameter
Channel Gain
Channel Gain
(2)
(2)
(2)
Conditions
All Channel, ASEL = 0
All Channel, ASEL = 1
(2)
(2)
Min.
-0.25
5.75
0.80
0.20
0.20
Typ.
0
6.00
1.00
0.35
0.35
10
-0.05
Max.
0.25
6.25
1.30
0.50
0.50
Unit
dB
dB
V
ms
dB
MHz
dB
%
°
%
dB
dB
ns
ns
ns
C
OUT
Output Level (During Sync)
Y
OUT
Output Level (During Sync)
CV
OUT
Output Level (During Sync)
Gain Flatness to 2.4MHz
-3dB Bandwidth
(2)
(2)
Sync Present on Y
IN
(after 6dB Gain)
Settled to within 10mV
All Channels
All Channels
All Channels at 27MHz
All Channels
All Channels
V
OUT
= 1.4V
PP
, 3.58MHz
At 3.58MHz
Clamp Response Time (Y Channel)
4.1
37
5.1
52
0.4
0.4
0.3
-45
75
70
136
10
0
Stopband Attenuation
Differential Gain
Differential Phase
Output Distortion
Crosstalk
Signal-to-Noise Ratio
Propagation Delay
Y, C Channel
CV Channel
NTC-7 weighting; 4.2MHz
LP, 100kHz HP
All Channels
All Channels at 3.58MHz
At 1MHz
f = 3.58MHz (referenced to
Y
IN
at 400KHz)
94
Group Delay Deviation
Skew Between Y
OUT
and C
OUT
Chroma-Luma Gain CV
OUT
(2)
100
10
104
%
ns
Chroma-Luma Delay CV
OUT
Note:
2. 100% tested at 25°C,
© 2004 Fairchild Semiconductor Corporation
FMS6400-1 • Rev. 1.0.1
www.fairchildsemi.com
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