Product Preview
MC33347
LITHIUM BATTERY
PROTECTION CIRCUIT
FOR
ONE OR TWO CELL
SMART BATTERY PACKS
SEMICONDUCTOR
TECHNICAL DATA
Lithium Battery Protection
Circuit for One or Two
Cell Battery Packs
The MC33347 is a monolithic lithium battery protection circuit that is
designed to enhance the useful operating life of one or two cell
rechargeable battery packs. Cell protection features consist of
independently programmable charge and discharge limits for both voltage
and current with a delayed current shutdown, continuous cell voltage
balancing with the choice of on–chip or external balancing resistors, and a
virtually zero current sleepmode state when the cells are discharged.
Additional features include an on–chip charge pump for reduced MOSFET
losses while charging or discharging a low cell voltage battery pack, and the
programmability for one or two cell battery pack. This protection circuit
requires a minimum number of external components and is targeted for
inclusion within the battery pack. This MC33347 is avaialble in standard and
low profile 16 lead surface mount packages.
•
Independently Programmable Charge and Discharge Limits for Both
Voltage and Current
•
Charge and Discharge Current Limit Detection with Delayed Shutdown
16
1
D SUFFIX
PLASTIC PACKAGE
CASE 751B
(SO–16)
•
•
•
•
•
•
•
Continuous Cell Voltage Balancing
On–Chip or External Balancing Resistors
Virtually Zero Current Sleepmode State when Cells are Discharged
Charge Pump for Reduced Losses with a Low Cell Voltage Battery Pack
Programmable for One or Two Cell Applications
Minimum External Components for Inclusion within the Battery Pack
Available in Low Profile Surface Mount Packages
PIN CONNECTIONS
Typical Two Cell Smart Battery Pack
Balance 1 1
Balance 2 2
Cell Program/
13
Test
Cell 2/VCC/
Discharge
Current Limit
4
Balance 2
2
Cell 1/VC
3
Balance 1
1
Ground
Current Sense
Common
9
10
Charge
Current Limit
Cell Voltage
6
Discharge Voltage
Threshold
16
1
DTB SUFFIX
PLASTIC PACKAGE
CASE 948F
(TSSOP–16)
16 Ground
15 Charge Pump Output
Discharge
Gate Drive Output
Cell Program/
13
Test
12 Charge
Gate Drive Output
14
11 Charge
Gate Drive Common
10 Charge Current Limit
Current Sense
9 Common
(Top View)
Cell 1/VC 3
Cell 2/VCC/
Discharge Current Limit 4
Cell Voltage Return 5
Cell Voltage 6
Discharge Voltage
7
Threshold
Charge Voltage 8
Threshold
MC33347
7
Charge Voltage
Threshold
8
Cell Voltage
Return
5
16
Charge Pump 15 Discharge 14
Charge 12 11 Charge
Output
Gate Drive
Gate Drive
Gate Drive
Output
Output
Common
ORDERING INFORMATION
Device
MC33347D
Operating
Temperature Range
TA = –25° to +85°C
Package
SO–16
TSSOP–16
This device contains 1543 active transistors.
MC33347DTB
MOTOROLA ANALOG IC DEVICE DATA
3–329
MC33347
MAXIMUM RATINGS
Ratings
Input Voltage (Measured with Respect to Ground, Pin 16)
Balance 1, 2 (Pin 1, 2)
Cell 1/VC (Pin 3)
Cell 2/VCC/Discharge Current Limit (Pin 4)
Cell Voltage Divider (Pins 5, 6, 7 and 8)
Current Sense Common (Pin 9)
Charge Current Limit (Pin 10)
Charge Gate Drive Common (Pin 11)
Charge Gate Drive Output (Pin 12)
Cell Program/Test (Pin 13)
Discharge Gate Drive Output (Pin 14)
Charge Pump Output (Pin 15)
External Cell Balancing Current (Pin 1, 2, Note 1)
Cell Voltage Divider Current
Source Current (Pin 4 to 6)
Sink Current (Pin 5 to 16)
Symbol
VIR
Value
15
7.5
18
18
30
30
±20
18 to –20
7.5
18
18
1.0
0.5
0.5
Unit
V
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Á Á
Ibal
Idiv
A
mA
Thermal Resistance, Junction–to–Air
DTB Suffix, TSSOP–16 Plastic Package, Case 948F
D Suffix, SO–16 Plastic Package, Case 751B
Operating Junction Temperature (Notes 1, 2 and 3)
Storage Temperature
R
θJA
°C/W
176
145
TJ
–40 to +150
–55 to +150
°C
°C
Tstg
NOTE:
ESD data available upon request.
ELECTRICAL CHARACTERISTICS
(VCC (Pin 4) = 8.0 V, VC (Pin 3) = 4.0 V, TA = 25°C, for min/max values TA is the
operating junction temperature range that applies (Notes 2 and 3), unless otherwise noted.)
Characteristic
VOLTAGE SENSING
Charge or Discharge Voltage Inputs (Pin 7 or 8 to Pin 5)
Threshold Voltage
Input Bias Current
Input Hysteresis Source Current (Pin 8)
Vth
IIB
I
H
–
–
–
–
–
–
–
–
1.230
20
2.0
–
–
–
–
–
–
–
–
V
nA
Symbol
Min
Typ
Max
Unit
µA
V
Cell Charge or Discharge Programmable Input Voltage Range (Pin 7 or 8)
Cell Selector Series Resistance
Cell Positive to Top of Divider (Pin 3 or 4 to Pin 6)
Cell Negative to Bottom of Divider (Pin 3 or 16 to Pin 5)
Cell Voltage Sampling Rate
VIR(pgm)
RS+
RS–
Vth
∆V
Vth to 7.5
100
100
1.0
Ω
t(smpl)
s
Cell Program/ Test Input Threshold Voltage (Pin 13)
VCell 1/2.0
V
CELL VOLTAGE BALANCING
Cell Voltage Balancing Accuracy (Note 4)
Internal Balancing Resistance (Pin 3, 4)
–
–
–
1.0
80
–
–
–
%
Ω
Ω
Rbal
Balancing MOSFET On Resistance (Pin 1, 2)
RDS(on)
1.0
NOTES:
1. Maximum package power dissipation limits must be observed.
2. Low duty cycle pulse techniques are used during test to maintain the junction temperature as close to ambient as possible.
3. Tested ambient temperature range for the MC33347:
Tlow = –25°C
Thigh = +85°C
V
– V
Cell 1
Cell 2
D
V x 100
4. Cell voltage balancing accuracy is defined as:
x 100
V
V
V avg
Cell 1
Cell 2
2
+
)
3–330
MOTOROLA ANALOG IC DEVICE DATA
MC33347
ELECTRICAL CHARACTERISTICS
(continued)
(VCC (Pin 4) = 8.0 V, VC (Pin 3) = 4.0 V, TA = 25°C, for min/max values TA is the
operating junction temperature range that applies (Notes 2 and 3), unless otherwise noted.)
Characteristic
CURRENT SENSING
Symbol
Min
Typ
Max
Unit
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Charge Current Limit (Pin 10 to Pin 9)
Threshold Voltage
Input Bias Current
Delay
Vth(chg)
IIB(chg)
Idly(chg)
–
–
–
–
–
–
18
200
3.0
50
200
3.0
–
–
–
–
–
–
mV
nA
ms
mV
nA
ms
Discharge Current Limit (Pin 4 to Pin 9)
Threshold Voltage
Input Bias Current
Delay
Output Voltage (Pin 15, RL
≥
1010
Ω)
Vth(dschg)
IIB(dschg)
Idly(dschg)
VO
CHARGE PUMP
–
10.2
–
V
TOTAL DEVICE
Average Cell Current
Operating (VCC = 8.0 V)
Sleepmode (VCC = 5.0 V)
ICC
–
–
12.5
15
–
–
µA
nA
V
Minimum Operating Cell Voltage for Logic and Gate Drivers
Programmed for Two Cell Operation
Cell 1 Voltage
Cell 2 Voltage
Programmed for One Cell Operation
Cell 1 Voltage
VCC
–
–
–
1.5
0
1.5
–
–
–
NOTES:
1. Maximum package power dissipation limits must be observed.
2. Low duty cycle pulse techniques are used during test to maintain the junction temperature as close to ambient as possible.
3. Tested ambient temperature range for the MC33347:
Tlow = –25°C
Thigh = +85°C
V
– V
Cell 1
Cell 2
D
V x 100
4. Cell voltage balancing accuracy is defined as:
x 100
V
V
V avg
Cell 1
Cell 2
2
+
)
MOTOROLA ANALOG IC DEVICE DATA
3–331
MC33347
PIN FUNCTION DESCRIPTION
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1
Balance 1
This is the drain connection to an internal MOSFET. An external resistor is placed from this pin to the
positive terminal of Cell 1 for increased cell balancing capability. This allows most of the additional
power to be dissipated off–chip.
This is the drain connection to an internal MOSFET. An external resistor is placed from this pin to the
positive terminal of Cell 2 for increased cell balancing capability. This allows most of the additional
power to be dissipated off–chip.
This is a multifunction pin that connects to a high impedance node of the Cell Selector where it is
used to monitor the positive terminal of Cell 1 and the negative terminal of Cell 2. This pin also
provides logic biasing and a discharge path for the internal balancing of Cell 1.
2
Balance 2
3
Cell 1/VC
4
Cell 2/VCC/
Discharge Current Limit
This is a multifunction pin that connects to a high impedance node of the Cell Selector where it is
used to monitor the positive terminal of Cell 2 and to provide positive supply voltage for the protection
IC. This pin is also used to monitor the voltage drop across the discharge current limit resistor and it
provides a discharge path for the internal balancing of Cell 2.
The bottom side of a three resistor divider string connects to this pin. The Cell Selector internally
switches this point to the negative terminal of the cell that is to be monitored.
5
6
7
Cell Voltage Return
Cell Voltage
The top side of a three resistor divider string connects to this pin. The Cell Selector internally switches
this point to the positive terminal of the cell that is to be monitored.
Discharge Voltage
Threshold
The upper tap of a three resistor divider string connects to this pin. The Cell Voltage Detector
compares the divided down cell voltage to an internal reference. If the comparator detects that the cell
voltage has fallen below the programmed level for three consecutive samples, discharge switch Q2 is
disabled, and the protection circuit enters into a low current sleepmode state. This prevents further
discharging of the battery pack.
The lower tap of a three resistor divider string connects to this pin. The Cell Voltage Detector
compares the divided down cell voltage to an internal reference. If the comparator detects that the cell
voltage has risen above the programmed level, charge switch Q1 is disabled, preventing further
charging of the battery pack. A 2.0
µA
current source pull–up is internally applied to this pin creating
input hysteresis.
This pin is a common point that is used to monitor the voltage drop across the charge and discharge
current limit resistors.
This pin is used to monitor the voltage drop across the charge current limit resistor.
8
Charge Voltage
Threshold
9
Current Sense Common
Charge Current Limit
Charge Gate Drive
Common
Charge Gate Drive
Output
Cell Program/Test
10
11
This pin provides a gate turn–off path for charge switch Q1. The charge switch source and the battery
pack negative terminal connect to this point.
This output connects to the gate of charge switch Q1 allowing it to enable or disable battery pack
charging.
12
13
14
15
16
This is a multifunction input that is used to program the number of cells and to facilitate circuit testing.
This input is connected to Pin 3 for two cell operation, and to Pin 16 for one cell operation.
This output connects to the gate of discharge switch Q2 allowing it to enable or disable battery pack
discharging.
This is the charge pump output. A reservoir capacitor is connected from this pin to ground.
This is the protection IC ground and all voltage ratings are with respect to this pin.
Discharge Gate Drive
Output
Charge Pump Output
Ground
Pin
Symbol
Description
3–332
MOTOROLA ANALOG IC DEVICE DATA
MC33347
INTRODUCTION
The insatiable demand for smaller lightweight portable
electronic equipment has dramatically increased the
requirements of battery performance. Batteries are expected
to have higher energy densities, superior cycle life, be safe in
operation and environmentally friendly. To address these
high expectations, battery manufacturers have invested
heavily in developing rechargeable lithium–based cells.
Today’s most attractive chemistries include lithium–polymer,
lithium–ion, and lithium–metal. Each of these chemistries
require electronic protection in order to constrain cell
operation to within the manufacturers limits.
Rechargeable lithium–based cells require precise charge
and discharge termination limits for both voltage and current
in order to maximize cell capacity, cycle life, and to protect
the end user from a catastrophic event. The termination limits
are not as well defined as with older non–lithium chemistries.
These limits are dependent upon a manufacturer’s particular
lithium chemistry, construction technique, and intended
application. Battery pack assemblers may also choose to
enhance cell capacity at the expense of cycle life. In order to
address these requirements the MC33347 was developed.
This device features programmable voltage and current
limits, cell voltage balancing, low operating current, a virtually
zero current sleepmode state, and requires few external
components to implement a complete one or two cell smart
battery pack.
A functional description of the protection circuit blocks
follows. Refer to the detailed block diagram shown in
Figures 7 and 8.
Voltage Sensing
Individual cell voltage sensing is accomplished by the use
of the Cell Selector in conjunction with the Floating
Over/Under Voltage Detector and Reference block. The Cell
Selector applies the voltage of each cell across an external
resistor divider string that connects from Pins 6 to 5. The
voltage at each of the tap points is sequentially polled and
compared to an internal reference. If a limit has been
exceeded, the result is stored in the Over/Under Data Latch
and Control Logic block. The Cell Selector is gated on for a
1.0 ms period at a one second repetition rate. This low duty
cycle sampling technique reduces the average load current
that the divider presents across each cell, thus extending the
useful battery pack capacity. The cells are sensed in the
following sequence:
Figure 2. Cell Sensing Sequence
OPERATING DESCRIPTION
The MC33347 is specifically designed to be placed in the
battery pack where it is continuously powered from either one
or two lithium cells. In order to maintain cell operation within
specified limits, the protection circuit senses both cell voltage
and current, and correspondingly controls the state of two
N–channel MOSFET switches. These switches, Q1 and Q2,
are placed in series with the negative terminal of Cell 1 and
the negative terminal of the battery pack. This configuration
allows the protection circuit to interrupt the appropriate
charge or discharge path FET in the event that a programmed
voltage or current limit for either cell has been exceeded.
Figure 1. Simplified Two Cell Smart Battery Pack
RLim(dschg)
RLim(chg)
9
13
4
Cell 2
2
MC33347
3
Cell 1
1
16
15
14
12
11
5
8
R3
7
R2
6
R1
10
Discharge
MOSFET Q2
Charge
MOSFET Q1
MOTOROLA ANALOG IC DEVICE DATA
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1
2
3
4
0.25
0.25
0.25
0.25
Cell 2
Cell 1
Cell 2
Cell 1
Overvoltage
Overvoltage
Undervoltage
Undervoltage
Polling
Sequence
Time
(ms)
Cell
Sensed
Tested
Limit
By incorporating this polling technique with a single
floating comparator and voltage divider, a significant
reduction of circuitry and trim elements is achieved. This
results in a smaller die size, lower cost, and reduced
operating current.
Figure 3. Cell Voltage Limit Programming
From
Cell
Selector
Floating
Over/Under
Cell Voltage
Detector
&
Reference
To
Cell
Selector
Cell Voltage
6
Discharge Voltage
Threshold
7
Charge Voltage
Threshold
8
Cell Voltage
Return
5
R1
+
Cell
Voltage
R2
–
R3
The cell charge and discharge voltage limits are controlled
by the values selected for the resistor divider string and the
1.23 V input threshold of Pins 7 and 8. As the battery pack
reaches full charge, the Cell Voltage Detector will sense an
overvoltage fault condition on the first cell that exceeds the
programmed overvoltage limit. The fault information is stored
in a data latch and charge MOSFET Q1 is turned off,
disconnecting the battery pack from the charging source. An
internal 2.0
µA
current source pull–up is then applied to Pin 8
creating an input hysteresis voltage. As a result of an
overvoltage fault, the battery pack is available for
discharging only.
3–333
FPGA/CPLD
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