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MC74LCX540
Low−Voltage CMOS
Octal Buffer
Flow Through Pinout
With 5 V−Tolerant Inputs and Outputs
(3−State, Inverting)
The MC74LCX540 is a high performance, inverting octal buffer
operating from a 2.3 to 3.6 V supply. This device is similar in function
to the MC74LCX240, while providing flow through architecture.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A V
I
specification of 5.5 V allows
MC74LCX540 inputs to be safely driven from 5 V devices. The
MC74LCX540 is suitable for memory address driving and all TTL
level bus oriented transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OE1, OE2) inputs, when HIGH, disables the outputs by placing them
in a HIGH Z condition.
Features
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MARKING
DIAGRAMS
20
SOIC−20
DW SUFFIX
CASE 751D
1
LCX540
AWLYYWW
20
1
20
TSSOP−20
DT SUFFIX
CASE 948E
1
LCX
540
ALYW
20
1
•
•
•
•
•
•
•
•
Designed for 2.3 to 3.6 V V
CC
Operation
5 V Tolerant − Interface Capability With 5 V TTL Logic
Supports Live Insertion and Withdrawal
I
OFF
Specification Guarantees High Impedance When V
CC
= 0 V
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10
mA)
Substantially Reduces System Power Requirements
•
Latchup Performance Exceeds 500 mA
•
ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
•
Pb−Free Packages are Available*
20
SOEIAJ−20
M SUFFIX
CASE 967
1
74LCX540
AWLYWW
20
1
A
L, WL
Y, YY
W, WW
=
=
=
=
Assembly Location
Wafer Lot
Year
Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
January, 2005 − Rev. 5
Publication Order Number:
MC74LCX540/D
MC74LCX540
OE1
OE2
V
CC
20
OE2
19
O0
18
O1
17
O2
16
O3
15
O4
14
O5
13
O6
12
O7
11
D1
D2
D3
1
OE1
2
D0
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
10
GND
D4
D5
D6
1
19
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
O0
O1
O2
O3
O4
O5
O6
O7
D0
Figure 1. Pinout: 20−Lead
(Top View)
PIN NAMES
Pins
OEn
Dn
On
Function
Output Enable Inputs
Data Inputs
3−State Outputs
D7
Figure 2. LOGIC DIAGRAM
TRUTH TABLE
INPUTS
OE1
L
L
X
H
OE2
L
L
H
X
Dn
L
H
X
X
OUTPUTS
On
H
L
Z
Z
H = High Voltage Level
L = Low Voltage Level
Z = High Impedance State
X = High or Low Voltage Level and Transitions are Acceptable
For I
CC
reasons, DO NOT FLOAT Inputs
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2
MC74LCX540
MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
Parameter
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Value
−0.5 to +7.0
−0.5
≤
V
I
≤
+7.0
−0.5
≤
V
O
≤
+7.0
−0.5
≤
V
O
≤
V
CC
+ 0.5
I
IK
I
OK
DC Input Diode Current
DC Output Diode Current
−50
−50
+50
I
O
I
CC
I
GND
T
STG
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
±50
±100
±100
−65 to +150
Output in 3−State
Note 1
V
I
< GND
V
O
< GND
V
O
> V
CC
Condition
Unit
V
V
V
V
mA
mA
mA
mA
mA
mA
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Output in HIGH or LOW State. I
O
absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
I
OH
I
OL
I
OH
I
OL
T
A
Dt/DV
Supply Voltage
Input Voltage
Output Voltage
(HIGH or LOW State)
(3−State)
Parameter
Operating
Data Retention Only
Min
2.0
1.5
0
0
0
Typ
3.3
3.3
Max
3.6
3.6
5.5
V
CC
5.5
−24
24
−12
12
−40
0
+85
10
Unit
V
V
V
mA
mA
mA
mA
°C
ns/V
HIGH Level Output Current, V
CC
= 3.0 V − 3.6 V
LOW Level Output Current, V
CC
= 3.0 V − 3.6 V
HIGH Level Output Current, V
CC
= 2.7 V − 3.0 V
LOW Level Output Current, V
CC
= 2.7 V − 3.0 V
Operating Free−Air Temperature
Input Transition Rise or Fall Rate, V
IN
from 0.8 V to 2.0 V, V
CC
= 3.0 V
ORDERING INFORMATION
Device
MC74LCX540DWR2
MC74LCX540DR2G
MC74LCX540DT
MC74LCX540DTR2
MC74LCX540MEL
Package
SOIC−20
SOIC−20
(Pb−Free)
TSSOP−20*
TSSOP−20*
SOEIAJ−20
Shipping
†
1000 Tape & Reel
1000 Tape & Reel
75 Units / Rail
2000 Tape & Reel
2000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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3
MC74LCX540
DC ELECTRICAL CHARACTERISTICS
T
A
= −40°C to +85°C
Symbol
V
IH
V
IL
V
OH
Characteristic
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
HIGH Level Output Voltage
Condition
2.7 V
≤
V
CC
≤
3.6 V
2.7 V
≤
V
CC
≤
3.6 V
2.7 V
≤
V
CC
≤
3.6 V; I
OH
= −100
mA
V
CC
= 2.7 V; I
OH
= −12 mA
V
CC
= 3.0 V; I
OH
= −18 mA
V
CC
= 3.0 V; I
OH
= −24 mA
V
OL
LOW Level Output Voltage
2.7 V
≤
V
CC
≤
3.6 V; I
OL
= 100
mA
V
CC
= 2.7 V; I
OL
= 12 mA
V
CC
= 3.0 V; I
OL
= 16 mA
V
CC
= 3.0 V; I
OL
= 24 mA
I
I
I
OZ
I
OFF
I
CC
Input Leakage Current
3−State Output Current
Power−Off Leakage Current
Quiescent Supply Current
y
2.7 V
≤
V
CC
≤
3.6 V; 0 V
≤
V
I
≤
5.5 V
2.7
≤
V
CC
≤
3.6 V; 0 V
≤
V
O
≤
5.5 V;
V
I
= V
IH
or V
IL
V
CC
= 0 V; V
I
or V
O
= 5.5 V
2.7
≤
V
CC
≤
3.6 V; V
I
= GND or V
CC
2.7
≤
V
CC
≤
3.6 V; 3.6
≤
V
I
or V
O
≤
5.5 V
DI
CC
Increase in I
CC
per Input
2.7
≤
V
CC
≤
3.6 V; V
IH
= V
CC
− 0.6 V
2. These values of V
I
are used to test DC electrical characteristics only.
V
CC
− 0.2
2.2
2.4
2.2
0.2
0.4
0.4
0.55
±5.0
±5.0
10
10
±10
500
mA
mA
mA
mA
mA
mA
V
Min
2.0
0.8
Max
Unit
V
V
V
AC CHARACTERISTICS
(t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500W)
Limits
T
A
= −40°C to +85°C
V
CC
= 3.0 V to 3.6 V
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
OSHL
t
OSLH
Parameter
Propagation Delay
Input to Output
Output Enable Time to
High and Low Level
Output Disable Time From
High and Low Level
Output−to−Output Skew (Note 3)
Waveform
1
2
2
Min
1.5
1.5
1.5
1.5
1.5
1.5
Max
6.5
6.5
8.5
8.5
7.5
7.5
1.0
1.0
V
CC
= 2.7 V
Max
7.5
7.5
9.5
9.5
8.5
8.5
Unit
ns
ns
ns
ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
OSHL
) or LOW−to−HIGH (t
OSLH
); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25°C
Symbol
V
OLP
Characteristic
Dynamic LOW Peak Voltage (Note 4)
Condition
V
CC
= 3.3 V, C
L
= 50 pF, V
IH
= 3.3 V, V
IL
= 0 V
Min
Typ
0.8
Max
Unit
V
V
OLV
Dynamic LOW Valley Voltage (Note 4)
V
CC
= 3.3 V, C
L
= 50 pF, V
IH
= 3.3 V, V
IL
= 0 V
0.8
V
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
C
IN
C
OUT
C
PD
Parameter
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Condition
V
CC
= 3.3 V, V
I
= 0 V or V
CC
V
CC
= 3.3 V, V
I
= 0 V or V
CC
10 MHz, V
CC
= 3.3V, V
I
= 0 V or V
CC
Typical
7
8
25
Unit
pF
pF
pF
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4
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