IS61WV6416DALL/DALS
IS61WV6416DBLL/DBLS
IS64WV6416DBLL/DBLS
64K x 16 HIGH SPEED ASYNCHRONOUS
CMOS STATIC RAM
FEATURES
HIGH SPEED: (IS61/64WV6416DALL/DBLL)
• High-speed access time: 8, 10, 12, 20 ns
• Low Active Power: 135 mW (typical)
• Low Standby Power: 12 µW (typical)
CMOS standby
LOW POWER: (IS61/64WV6416DALS/DBLS)
• High-speed access time: 25, 35 ns
• Low Active Power: 55 mW (typical)
• Low Standby Power: 12 µW (typical)
CMOS standby
• Single power supply
— V
dd
1.65V to 2.2V (IS61WV6416DAxx)
— V
dd
2.4V to 3.6V (IS61/64WV6416DBxx)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial and Automotive temperature support
• Lead-free available
JANUARY 2011
are high-speed, 1,048,576-bit static RAMs organized as
65,536 words by 16 bits. It is fabricated using
ISSI
's high-
performance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields
high-performance and low power consumption devices.
DESCRIPTION
The
ISSI
IS61WV6416DAxx/DBxx and IS64WV6416DBxx
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be re-
duced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS61WV6416DAxx/DBxx and IS64WV6416DBxx
are packaged in the JEDEC standard 44-pin TSOP Type
II, 44-pin 400-mil SOJ and 48-pin Mini BGA (6mm x
8mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A15
DECODER
64K x 16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
11/18/2010
1
IS61WV6416DALL/DALS, IS61WV6416DBLL/DBLS,
IS64WV6416DBLL/DBLS
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 3.3V + 5%
Symbol
V
oH
V
oL
V
IH
V
IL
I
LI
I
Lo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
dd
=
Min., I
oH
=
–4.0 mA
V
dd
=
Min., I
oL
=
8.0 mA
GND ≤ V
In
≤
V
dd
GND ≤ V
out
≤
V
dd
,
Outputs Disabled
Min.
2.4
—
2
–0.3
–1
–1
Max.
—
0.4
V
dd
+ 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
Note:
1. V
IL
(min.) = –0.3V DC; V
IL
(min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
V
IH
(max.) = V
dd
+ 0.3V
dc; V
IH
(max.) = V
dd
+ 2.0V
Ac (pulse width < 10 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 2.4V-3.6V
Symbol
V
oH
V
oL
V
IH
V
IL
I
LI
I
Lo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
dd
=
Min., I
oH
=
–1.0 mA
V
dd
=
Min., I
oL
=
1.0 mA
GND ≤
V
In
≤
V
dd
GND ≤
V
out
≤
V
dd
,
Outputs Disabled
Min.
1.8
—
2.0
–0.3
–1
–1
Max.
—
0.4
V
dd
+ 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
Note:
1.
V
IL
(min.) = –0.3V DC; V
IL
(min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
V
IH
(max.) = V
dd
+ 0.3V
dc; V
IH
(max.) = V
dd
+ 2.0V
Ac (pulse width < 10 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 1.65V-2.2V
Symbol
V
oH
V
oL
V
IH
V
IL
(1)
I
LI
I
Lo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
Test Conditions
V
DD
I
oH
=
-0.1 mA
1.65-2.2V
I
oL
=
0.1 mA
1.65-2.2V
1.65-2.2V
1.65-2.2V
GND ≤
V
In
≤
V
dd
GND ≤
V
out
≤
V
dd
,
Outputs Disabled
Min.
1.4
—
1.4
–0.2
–1
–1
Max.
—
0.2
V
dd
+ 0.2
0.4
1
1
Unit
V
V
V
V
µA
µA
Note:
1.
V
IL
(min.) = –0.3V DC; V
IL
(min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
V
IH
(max.) = V
dd
+ 0.3V
dc; V
IH
(max.) = V
dd
+ 2.0V
Ac (pulse width < 10 ns). Not 100% tested.
4
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
11/18/2010
FPGA/CPLD
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