Preliminary Data Sheet
April 2004
AGR18090E
90 W, 1.805 GHz—1.880 GHz, LDMOS RF Power Transistor
Introduction
The AGR18090E is a high-voltage, gold-metalized,
laterally diffused metal oxide semiconductor
(LDMOS) RF power transistor suitable for global sys-
tem for mobile communication (GSM), enhanced
data for global evolution (EDGE), and multicarrier
class AB power amplifier applications. This device is
manufactured using advanced LDMOS technology
offering state-of-the-art performance and reliability. It
is packaged in an industry-standard package and is
capable of delivering a typical output power of 90 W,
which makes it ideally suited for today’s wireless
base station RF power amplifier applications.
Table 1. Thermal Characteristics
Parameter
Thermal Resistance,
Junction to Case:
AGR18090EU
AGR18090EF
Sym
Value
Unit
R
θJC
R
θJC
0.75
0.75
°C/W
°C/W
Table 2. Absolute Maximum Ratings*
Parameter
Drain-source Voltage
Gate-source Voltage
Drain Current—Continuous
Total Dissipation at T
C
= 25 °C:
AGR18090EU
AGR18090EF
Derate Above 25
°C:
AGR18090EU
AGR18090EF
Operating Junction Tempera-
ture
Storage Temperature Range
Sym Value
V
DSS
65
V
GS
–0.5, 15
I
D
8.5
P
D
P
D
—
—
T
J
230
230
1.31
1.31
200
Unit
Vdc
Vdc
Adc
W
W
W/°C
W/°C
°C
°C
AGR18090EU (unflanged)
AGR18090EF (flanged)
Figure 1. Available Packages
Features
s
T
STG
–65, 150
s
s
s
s
s
s
s
s
s
Typical performance ratings for GSM EDGE
(f = 1.840 GHz, P
OUT
= 30 W):
— Modulation spectrum:
@ ±400 kHz = –63 dBc.
@ ±600 kHz = –73 dBc.
— Error vector magnitude (EVM) = 1.7%.
— Gain = 15 dB.
— Drain Efficiency = 31%.
Typical continuous wave (CW) performance over
entire digital communication system (DCS) band:
— P1dB: 90 W typ.
— Power gain: @ P1dB = 14 dB.
— Efficiency @ P1dB = 50% typ.
— Return loss: –10 dB.
High-reliability gold-metalization process.
Low hot carrier injection (HCI) induced bias drift
over 20 years.
Internally matched.
High gain, efficiency, and linearity.
Integrated ESD protection.
90 W minimum output power.
Device can withstand 10:1 voltage standing wave
ratio (VSWR) at 26 Vdc, 1.840 GHz, 90 W CW out-
put power.
Large signal impedance parameters available.
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3. ESD Rating*
AGR18090E
HBM
MM
CDM
Minimum (V)
500
50
1500
Class
1B
A
4
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations. Agere
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
AGR18090E
90 W, 1.805 GHz—
1.880 GHz, LDMOS RF Power Transistor
Preliminary Data Sheet
April 2004
Electrical Characteristics
Recommended operating conditions apply unless otherwise specified: T
C
= 30 °C.
Table 4. dc Characteristics
Parameter
Off Characteristics
Drain-source Breakdown Voltage (V
GS
= 0, I
D
= 200 µA)
Gate-source Leakage Current (V
GS
= 5 V, V
DS
= 0 V)
Zero Gate Voltage Drain Leakage Current (V
DS
= 28 V, V
GS
= 0 V)
On Characteristics
Forward Transconductance (V
DS
= 10 V, I
D
= 1 A)
Gate Threshold Voltage (V
DS
= 10 V, I
D
= 300 µA)
Gate Quiescent Voltage (V
DS
= 28 V, I
DQ
= 800 mA)
Drain-source On-voltage (V
GS
= 10 V, I
D
= 1 A)
Table 5. RF Characteristics
Parameter
Dynamic Characteristics
Drain-to-gate Capacitance
(V
DS
= 26 Vdc, V
GS
= 0, f = 1 MHz)
Drain-to-source Capacitance
(V
DS
= 26 Vdc, V
GS
= 0, f = 1 MHz)
Power Gain
(V
DS
= 26 V, P
OUT
= 90 W, I
DQ
= 800 mA)
Drain Efficiency
(V
DS
= 26 V, P
OUT
= 90 W, I
DQ
= 800 mA)
EDGE Linearity Characterization
(P
OUT
= 30 W, f = 1.840 GHz, V
DS
= 26 V, I
DQ
= 800 mA)
Modulation spectrum @ ±400 kHz
Modulation spectrum @ ±600 kHz
Output Power
(V
DS
= 26 V, 1 dB gain compression, I
DQ
= 800 mA)
Input Return Loss
Ruggedness
(V
DS
= 26 V, P
OUT
= 90 W, I
DQ
= 800 mA, VSWR = 10:1, all
angles)
1. Across full DCS band, 1.805 GHz—1.880 GHz.
Symbol
V
(BR)DSS
I
GSS
I
DSS
G
FS
V
GS(TH)
V
GS(Q)
V
DS(ON)
Min
65
—
—
—
—
—
—
Typ
—
—
—
6.4
—
3.8
0.11
Max
—
3.0
9
—
4.8
—
—
Unit
Vdc
µAdc
µAdc
S
Vdc
Vdc
Vdc
Symbol
C
RSS
C
OSS
Min
—
—
Typ
2.1
48
Max
—
—
Unit
pF
pF
Functional Tests (in Agere Systems Supplied Test Fixture)
1
G
L
η
—
—
14
50
—
—
dB
%
—
—
P1dB
IRL
ψ
—
—
–63
–73
90
–12
—
—
—
–8
dBc
dBc
W
dB
No degradation in output
power.
2
Agere Systems Inc.
Preliminary Data Sheet
April 2004
90 W, 1.805 GHz—
AGR18090E
1.880 GHz, LDMOS RF Power Transistor
Test Circuit Illustrations for AGR18090E
FB1
V
GG
+
Z12
C6
R2
C5
C4
C3
Z11
Z4
C2
Z6
Z1
RF INPUT
C1
Z2
Z3
Z5
2
1
3
DUT
RF OUTPUT
PINS: 1. DRAIN, 2. SOURCE, 3. GATE
V
DD
+
C7
C8
C9
Z7
C10
Z8
C11
C12
C13
Z10
R3
R1
Z9 C14
A. Schematic
Parts List:
s
Microstrip line: Z1 0.685 in. x 0.067 in.; Z2 0.280 in. x 0.067 in.: Z3 0.300 in. x 0.265 in.; Z4 0.150 in. x 0.465 in.; Z5 0.275 in. x 1.060 in.;
Z6 0.330 in. x 1.130 in.; Z7 0.220 in. x 0.375 in.; Z8 0.300 in. x 0.205 in.; Z9 0.290 in. x 0.067 in.; Z10 0.550 in. x 0.067 in.;
Z11 0.545 in. x 0.030 in.; Z12 0.800 in. x 0.050 in.
®
s
ATC
chip capacitors: C1, C14, 12 pF 100B120JW500X; C2, C7, 10 pF 100B100JW500X.
®
s
Sprague
tantalum surface-mount chip capacitors: C6, C13, 22 µF, 35 V.
®
s
Kemet
0603 size chip capacitor: C8, 220 pF; 1206 size chip capacitors: C5, C11, 0.1 µF C1206104K5RAC7800;
1812 size chip capacitor: C12, 1.0 µF C1812C105K5RACTR.
®
s
Murata
0805 size chip capacitors: C4, C10. 0.01 µF GRM40X7R103K100AL.
s
1206 size chip resistors: R1 4.7 kΩ, R2 560 kΩ, R3 1.02 kΩ.
®
s
Vitramon
1206 size chip capacitors: C3, C9, 22000 pF.
®
s
Fair-Rite
ferrite bead FB1 2743019447.
®
s
Taconic
ORCER RF-35: board material, 1 oz. copper, 30 mil thickness,
ε
r = 3.5.
B. Component Layout
Figure 2. AGR18090E Test Circuit
Agere Systems Inc.
3
AGR18090E
90 W, 1.805 GHz—
1.880 GHz, LDMOS RF Power Transistor
Preliminary Data Sheet
April 2004
Typical Performance Characteristics
S
TOW
0.0
Ð
>
W
A
V
EL
E
N
GTH
170
0.49
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.2
1.4
1.6
1.8
2.0
3.0
4.0
5.0
10
20
0.0
Ð
D
L
OA
D
<
OW
A
R
7
±
180
HST
0.4
70
N
GT
-1
E
V
EL
WA
<Ð
-90
-160
50
RESISTANCE COMPONENT (R/Zo), OR CONDUCTANCE COMPONENT (G/Yo)
0.2
f3
)
/
Yo
(-jB
CE
0.49
0.48
f1
f3
V
TI
UC
0.6
-85
N
TA
EP
SC
4
0.0
50
-1
-80
U
ES
0.4
0.3
6
IN
D
-75
R
5
0.0
O
),
Zo
5
0.4
X/
40
-1
-70
06
0.
0.6
-60
1.6
0.7
1.4
0.8
0.9
1.0
1.2
5
-5
0
-5
5
-4
GHz (f)
1.805 (f1)
1.8425 (f2)
1.880 (f3)
Z
L
Ω
Z
S
Ω
(Complex
Source Impedance) (Complex Optimum Load Impedance)
1.90 – j2.16
2.05 – j1.27
1.77 – j1.97
2.00 – j1.14
1.69 – j1.82
1.97 – j1.06
DRAIN (1)
Z
L
SOURCE (3)
GATE (2)
Z
S
INPUT MATCH
DUT
OUTPUT MATCH
Figure 3. Series Equivalent Input and Output Impedances
4
Agere Systems Inc.
F
0.
32
18
0.
0
-5
-25
44
0
-65
.5
0.
3
0.3
0.1
7
-30
-60
1.8
2.
0
0.3
0.1
4
6
-3
-70
5
0.35
0.15
0.36
0.14
-80
-4
0
0.37
0.13
0.4
0.2
-90
0.12
0.38
0.11
-100
0.39
CA
P
A
0.1
0.4
-110
CI
T
IVE
RE
AC
TA
NC
EC
OM
0.0
0.4
9
1
-12
0
0.0
8
PO
N
0.4
2
EN
T
(-j
4
0.
-15
4.0
-20
3.
0
1.
0
f1
0.8
0.6
5.0
1.
0.2
0
-10
Z
S
8
0.
10
0.1
Z
L
0.4
50
20
0.6
0.4
Z
0
= 4
Ω
A
RD
U
CT
0.48
IN
D
90
0.
8
10
0.1
0.
07
-1
30
0.
43
0.25
0.26
0.24
0.27
0.23
0.25
0.24
0.26
0.23
0.27
REFL
ECTI
ON
COEFFI
CI
EN
T
I
N
D
EG
R
L
E
OF
EES
ANG
I
SSI
ON
COEFFI
CI
EN
T
I
N
TRA
N
SM
D
EGR
EES
20
L
E
OF
ANG
0.2
0.2
0.3
-4
0
50
-20
0.2
2
0.2
8
0.2
9
0.2
1
-30
0.
19
0.
31
Preliminary Data Sheet
April 2004
90 W, 1.805 GHz—
AGR18090E
1.880 GHz, LDMOS RF Power Transistor
Typical Performance Characteristics
(continued)
120
60
50
POUT
80
EFFICIENCY
60
40
20
0
0
1
2
3
4
5
6
INPUT POWER (P
IN
) (W)Z
TEST CONDITIONS:
V
DD
= 26 V, I
DQ
= 800 mA, f = 1842.5 MHz, CW MEASUREMENT.
OUTPUT POWER (P
OUT
) (W)Z
100
40
30
20
10
0
Figure 4. Output Power and Efficiency vs. Input Power
17
I
DQ
= 950 mA
16
15
14
13
12
11
10
9
8
0.1
1.0
10.0
100.0
1000.0
OUTPUT POWER (P
OUT
) (W)Z
TEST CONDITIONS:
V
DD
= 26 V, f = 1842.5 MHz, CW MEASUREMENT.
I
DQ
= 1100 mA
Gps, POWER GAIN (dB)Z
I
DQ
= 500 mA
I
DQ
= 650 mA
I
DQ
= 800 mA
Figure 5. CW Power Gain vs. Output Power
Agere Systems Inc.
5
DRAIN EFFICIENCY (%)Z
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