IRFL210, SiHFL210
www.vishay.com
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
8.2
1.8
4.5
Single
D
FEATURES
200
1.5
•
•
•
•
•
•
•
•
Surface mount
Available in tape and reel
Dynamic dV/dt rating
Repetitive avalanche rated
Fast switching
Available
Ease of paralleling
Simple drive requirements
Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
DESCRIPTION
SOT-223
D
S
S
G
D
G
Marking code: FC
N-Channel MOSFET
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The SOT-223 package is designed for surface-mounting
using vapor phase, infrared, or wave soldering techniques.
Its unique package design allows for easy automatic
pick-and-place as with other SOT or SOIC packages but
has the added advantage of improved thermal performance
due to an enlarged tab for heatsinking. Power dissipation of
greater than 1.25 W is possible in a typical surface mount
application.
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
Note
a. See device orientation.
SOT-223
SiHFL210-GE3
IRFL210PbF
SiHFL210-E3
SOT-223
SiHFL210TR-GE3
a
IRFL210TRPbF
a
SiHFL210T-E3
a
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain
Current
a
Mount)
e
E
AS
I
AR
E
AR
T
C
= 25 °C
T
A
= 25 °C
P
D
dV/dt
T
J
, T
stg
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
200
± 20
0.96
0.6
7.7
0.025
0.017
50
0.96
0.31
3.1
2.0
5.0
-55 to +150
300
W/°C
mJ
A
mJ
W
V/ns
°C
A
UNIT
V
Linear Derating Factor
Linear Derating Factor (PCB
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche
Energy
a
Maximum Power Dissipation
Maximum Power Dissipation (PCB Mount)
e
Peak Diode Recovery dV/dt
c
Operating Junction and Storage Temperature Range
for 10 s
Soldering Recommendations (Peak Temperature)
d
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 81 mH, R
G
= 25
,
I
AS
= 0.96 A (see fig. 12).
c. I
SD
3.3 A, dI/dt
70 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
S14-1685-Rev. E, 18-Aug-14
Document Number: 91193
1
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFL210, SiHFL210
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
(PCB Mount)
a
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
MIN.
-
-
TYP.
-
-
MAX.
40
60
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
TEST CONDITIONS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
DS
= 200 V, V
GS
= 0 V
V
DS
= 160 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 0.58 A
b
V
DS
= 50 V, I
D
= 0.58 A
MIN.
200
-
2.0
-
-
-
-
0.51
-
-
-
-
-
-
-
TYP.
-
0.30
-
-
-
-
-
-
140
53
15
-
-
-
8.2
17
14
8.9
4.0
6.0
MAX.
-
-
4.0
± 100
25
250
1.5
-
-
-
-
8.2
1.8
4.5
-
-
-
-
-
UNIT
V
V/°C
V
nA
μA
S
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
I
D
= 3.3 A, V
DS
= 160 V,
see fig. 6 and 13
b
pF
V
GS
= 10 V
nC
V
DD
= 100 V, I
D
= 3.3 A,
R
g
= 24
,
R
D
= 30
,
see fig. 10
b
-
-
-
ns
Between lead,
6 mm (0.25") from
package and center of
die contact
D
-
G
nH
-
S
-
-
-
-
-
-
-
-
-
150
0.60
0.96
A
7.7
2.0
310
1.4
V
ns
μC
G
S
T
J
= 25 °C, I
S
= 0.96 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 3.3 A, dI/dt = 100 A/μs
b
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
300 μs; duty cycle
2 %.
S14-1685-Rev. E, 18-Aug-14
Document Number: 91193
2
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFL210, SiHFL210
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
10
1
Top
Vishay Siliconix
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
V
GS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
3.5
I
D
= 3.3 A
3.0 V
GS
= 10 V
2.5
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20
I
D
, Drain Current (A)
10
0
10
-1
4.5 V
20 µs Pulse Width
T
C
=
25 °C
10
-1
91193_01
10
0
10
1
91193_04
0
20 40 60 80 100 120 140 160
V
DS
, Drain-to-Source Voltage (V)
T
J,
Junction Temperature (°C)
Fig. 1 - Typical Output Characteristics, T
C
= 25 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
I
D
, Drain Current (A)
10
0
Capacitance (pF)
V
GS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
300
250
200
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
C
iss
4.5 V
150
C
oss
100
50
0
10
0
10
1
C
rss
10
-1
20 µs Pulse Width
T
C
=
150 °C
10
-1
10
0
10
1
91193_02
V
DS,
Drain-to-Source Voltage (V)
91193_05
V
DS,
Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics, T
C
= 150 °C
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
V
GS
, Gate-to-Source Voltage (V)
I
D
= 3.3 A
V
DS
= 160 V
V
DS
= 100 V
I
D
, Drain Current (A)
10
0
150
°
C
25
°
C
16
V
DS
= 40 V
12
10
-1
8
10
-2
4
For test circuit
see figure 13
20 µs Pulse Width
V
DS
=
50 V
4
5
6
7
8
9
10
0
0
91193_06
2
4
6
8
10
91193_03
V
GS,
Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Q
G
, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
S14-1685-Rev. E, 18-Aug-14
Document Number: 91193
3
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFL210, SiHFL210
www.vishay.com
Vishay Siliconix
1.0
10
1
I
SD
, Reverse Drain Current (A)
I
D
, Drain Current (A)
V
GS
= 0 V
1.2
1.6
2.0
91193_09
0.8
0.6
10
0
150
°
C
25
°
C
0.4
0.2
10
-1
0.4
91193_07
0.0
25
50
75
100
125
150
0.8
V
SD
, Source-to-Drain Voltage (V)
T
C
, Case Temperature (°C)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 9 - Maximum Drain Current vs. Case Temperature
R
D
10
2
5
Operation in this area limited
by R
DS(on)
R
g
V
DS
V
GS
I
D
, Drain Current (A)
2
D.U.T.
+
- V
DD
10
5
10 V
2
100
µs
1
ms
T
C
= 25
°C
T
J
= 150
°C
Single Pulse
1
2
5
1
5
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
Fig. 10a - Switching Time Test Circuit
V
DS
2
10
ms
2
5
2
5
0.1
10
10
2
10
3
90 %
91193_08
V
DS
, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 10b - Switching Time Waveforms
10
2
Thermal Response (Z
thJC
)
0
-
0.5
10
0.2
0.1
0.05
0.02
0.01
Single Pulse
(Thermal Response)
P
DM
t
1
t
2
Notes:
1. Duty Factor, D = t
1
/t
2
2. Peak T
j
= P
DM
x Z
thJC
+ T
C
10
-4
10
-3
10
-2
0.1
1
10
10
2
10
3
1
0.1
10
-2
10
-5
91193_11
t
1
, Rectangular Pulse Duration (S)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
S14-1685-Rev. E, 18-Aug-14
Document Number: 91193
4
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFL210, SiHFL210
www.vishay.com
Vishay Siliconix
V
DS
t
p
V
DD
L
Vary t
p
to obtain
required I
AS
R
g
V
DS
D.U.T
I
AS
+
-
V
DD
V
DS
10 V
t
p
0.01
Ω
I
AS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12a - Unclamped Inductive Test Circuit
120
E
AS
, Single Pulse Energy (mJ)
100
80
60
40
20
0
V
DD
= 50 V
25
50
75
100
I
D
0.43 A
0.61 A
Bottom 0.90 A
Top
125
150
91193_12C
Starting T
J
, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
12 V
0.2 µF
0.3 µF
V
GS
Q
GS
Q
G
Q
GD
D.U.T.
+
-
V
DS
V
G
V
GS
3 mA
Charge
I
G
I
D
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
S14-1685-Rev. E, 18-Aug-14
Document Number: 91193
5
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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