74VHCT540AFT,74VHCT541AFT
CMOS Digital Integrated Circuits Silicon Monolithic
74VHCT540AFT,74VHCT541AFT
1. Functional Description
• Octal Bus Buffer
74VHCT540AFT: INVERTED, 3-STATE OUTPUTS
74VHCT541AFT: NON-INVERTED, 3-STATE OUTPUTS
2. General
The 74VHCT540AFT and 74VHCT541AFT are advanced high speed CMOS OCTAL BUS BUFFERs fabricated
with silicon gate C
2
MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining the CMOS low power dissipation.
The 74VHCT540AFT is an inverting type and, the 74VHCT541AFT is a non-inverting type.
When either G1 or G2 are high, the terminal outputs are in the high-impedance state.
The input voltage are compatible with TTL output voltage.
These devices may be used as a level converter for interfacing 3.3 V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins
without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and
input/output voltages such as battery back up, hot board insertion, etc.
Note: Output in off-state
3. Features
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
AEC-Q100 (Rev. H) (Note 1)
Wide operating temperature range: T
opr
= -40 to 125
High speed: Propagation delay time = 5.4 ns (typ.) at V
CC
= 5.0 V
Quiescent supply current: I
CC
= 4.0
µA
(max) at T
a
= 25
Compatible with TTL input: V
IL
= 0.8 V (max)
V
IH
= 2.0 V (min)
Power down protection is provided on all inputs and outputs.
Balanced propagation delays: t
PLH
≈
t
PHL
Low noise: V
OLP
= 1.5 V (max)
Pin and function compatible with the 74 series
(ACT/HCT/AHCT etc.) 540/541 type.
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales
representative.
Start of commercial production
©2017 Toshiba Corporation
1
2013-01
2017-02-23
Rev.4.0
74VHCT540AFT,74VHCT541AFT
4. Packaging
TSSOP20B
5. Pin Assignment
74VHCT540AFT
74VHCT541AFT
6. Marking
74VHCT540AFT
74VHCT541AFT
©2017 Toshiba Corporation
2
2017-02-23
Rev.4.0
74VHCT540AFT,74VHCT541AFT
7. IEC Logic Symbol
74VHCT540AFT
74VHCT541AFT
8. Truth Table
Input G1
H
X
L
L
Input G2
X
H
L
L
Input An
X
X
H
L
Output Yn
Z
Z
H
L
Output Yn
Z
Z
L
H
X:
Z:
Yn:
Yn:
Don't care
High impedance
74VHCT541AFT
74VHCT540AFT
9. Absolute Maximum Ratings (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Input diode current
Output diode current
Output current
V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
(Note4)
(Note3)
(Note1)
(Note2)
Note
Rating
-0.5 to 7.0
-0.5 to 7.0
-0.5 to 7.0
-0.5 to V
CC
+ 0.5
-20
±20
±25
±75
180
-65 to 150
mW
mA
Unit
V
Note:
Note1:
Note2:
Note3:
Note4:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Output in OFF state.
High (H) or Low (L) state. I
OUT
absolute maximum rating must be observed.
V
OUT
< GND, V
OUT
> V
CC
180 mW in the range of T
a
= -40 to 85
.
From T
a
= 85 to 125
a derating factor of -3.25 mW/ shall be
applied until 50 mW.
©2017 Toshiba Corporation
3
2017-02-23
Rev.4.0
74VHCT540AFT,74VHCT541AFT
10. Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall times
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dv
(Note1)
(Note2)
Note
Rating
4.5 to 5.5
0 to 5.5
0 to 5.5
0 to V
CC
-40 to 125
0 to 20
ns/V
Unit
V
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either V
CC
or GND.
Note1: Output in OFF state.
Note2: High (H) or Low (L) state.
Note:
11. Electrical Characteristics
11.1. DC Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
3-state output OFF-state
leakage current
Input leakage current
Quiescent supply
current
Output leakage current
(Power-OFF)
Symbol
V
IH
V
IL
V
OH
V
OL
I
OZ
I
IN
I
CC
I
CCT
I
OPD
Test Condition
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND
Per input: V
IN
= 3.4 V
Other input: V
CC
or GND
V
OUT
= 5.5 V
I
OH
= -50
µA
I
OH
= -8 mA
I
OL
= 50
µA
I
OL
= 8 mA
V
CC
(V)
4.5 to 5.5
4.5 to 5.5
4.5
4.5
4.5
4.5
5.5
0 to 5.5
5.5
5.5
0
Min
2.0
4.4
3.94
Typ.
4.5
0.0
Max
0.8
0.1
0.36
±0.25
±0.1
4.0
1.35
0.5
µA
µA
µA
mA
µA
V
Unit
V
V
V
11.2. DC Characteristics (Unless otherwise specified, T
a
= -40 to 85
)
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
3-state output OFF-state
leakage current
Input leakage current
Quiescent supply current
Quiescent supply current
Output leakage current
(Power-OFF)
Symbol
V
IH
V
IL
V
OH
V
OL
I
OZ
I
IN
I
CC
I
CCT
I
OPD
Test Condition
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND
Per input: V
IN
= 3.4 V
Other input: V
CC
or GND
V
OUT
= 5.5 V
I
OH
= -50
µA
I
OH
= -8 mA
I
OL
= 50µA
I
OL
= 8 mA
V
CC
(V)
4.5 to 5.5
4.5 to 5.5
4.5
4.5
4.5
4.5
5.5
0 to 5.5
5.5
5.5
0
Min
2.0
4.4
3.80
Max
0.8
0.1
0.44
±2.50
±1.0
40.0
1.50
5.0
µA
µA
µA
mA
µA
V
Unit
V
V
V
©2017 Toshiba Corporation
4
2017-02-23
Rev.4.0
74VHCT540AFT,74VHCT541AFT
11.3. DC Characteristics (Unless otherwise specified, T
a
= -40 to 125
)
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
3-state output OFF-state
leakage current
Input leakage current
Quiescent supply current
Symbol
V
IH
V
IL
V
OH
V
OL
I
OZ
I
IN
I
CC
I
CCT
Output leakage current
(Power-OFF)
I
OPD
Test Condition
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND
Per input: V
IN
= 3.4 V
Other input: V
CC
or GND
V
OUT
= 5.5 V
I
OH
= -50
µA
I
OH
= -8 mA
I
OL
= 50
µA
I
OL
= 8 mA
V
CC
(V)
4.5 to 5.5
4.5 to 5.5
4.5
4.5
4.5
4.5
5.5
0 to 5.5
5.5
5.5
0
Min
2.0
4.4
3.70
Max
0.8
0.1
0.55
±10.0
±2.0
80.0
1.50
20.0
µA
µA
µA
mA
µA
V
Unit
V
V
V
11.4. AC Characteristics (Unless otherwise specified, T
a
= 25
, Input: t
r
= t
f
= 3 ns)
Characteristics
Propagation delay time
Part Number
Symbol
Note
Test
Condition
V
CC
(V)
5.0
±
0.5
5.0
±
0.5
5.0
±
0.5
5.0
±
0.5
5.0
±
0.5
C
L
(pF)
15
50
74VHCT541AFT t
PLH
,t
PHL
3-state output enable time
3-state output disable time
Output skew
Input capacitance
Output capacitance
Power dissipation
capacitance
t
PZL
,t
PZH
t
PLZ
,t
PHZ
t
osLH
,t
osHL
(Note 1)
C
IN
C
OUT
C
PD
(Note 2)
15
50
R
L
= 1 kΩ
R
L
= 1 kΩ
15
50
50
50
Min
Typ.
5.4
5.9
5.0
5.5
8.3
8.8
9.4
4
9
19
Max
7.4
8.4
6.9
7.9
11.3
12.3
11.9
1.0
10
ns
ns
pF
pF
pF
ns
ns
Unit
ns
74VHCT540AFT t
PLH
,t
PHL
Note 1: Parameter guaranteed by design. (t
osLH
= |t
PLH
m-t
PLH
n|, t
osHL
= |t
PHL
m-t
PHL
n|)
Note 2: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
I
CC(opr)
= C
PD
×
V
CC
×
f
IN
+ I
CC
/8 (per bit)
11.5. AC Characteristics
(Unless otherwise specified, T
a
= -40 to 85
, Input: t
r
= t
f
= 3 ns)
Characteristics
Propagation delay time
Part Number
Symbol
Note
Test
Condition
V
CC
(V)
5.0
±
0.5
5.0
±
0.5
5.0
±
0.5
5.0
±
0.5
5.0
±
0.5
C
L
(pF)
15
50
74VHCT541AFT t
PLH
,t
PHL
3-state output enable time
3-state output disable time
Output skew
Input capacitance
t
PZL
,t
PZH
t
PLZ
,t
PHZ
t
osLH
,t
osHL
(Note 1)
C
IN
15
50
R
L
= 1 kΩ
R
L
= 1 kΩ
15
50
50
50
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
8.5
9.5
8.0
9.0
13.0
14.0
13.5
1.0
10
ns
ns
pF
ns
ns
Unit
ns
74VHCT540AFT t
PLH
,t
PHL
Note 1: Parameter guaranteed by design. (t
osLH
= |t
PLH
m-t
PLH
n|, t
osHL
= |t
PHL
m-t
PHL
n|)
©2017 Toshiba Corporation
5
2017-02-23
Rev.4.0
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