MC34151, MC33151
High Speed Dual
MOSFET Drivers
The MC34151/MC33151 are dual inverting high speed drivers
specifically designed for applications that require low current digital
circuitry to drive large capacitive loads with high slew rates. These
devices feature low input current making them CMOS and LSTTL
logic compatible, input hysteresis for fast output switching that is
independent of input transition time, and two high current totem pole
outputs ideally suited for driving power MOSFETs. Also included is
an undervoltage lockout with hysteresis to prevent erratic system
operation at low supply voltages.
Typical applications include switching power supplies, dc to dc
converters, capacitor charge pump voltage doublers/inverters, and
motor controllers.
These devices are available in dual−in−line and surface mount
packages.
Features
8
1
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MARKING
DIAGRAMS
8
PDIP−8
P SUFFIX
CASE 626
1
8
SOIC−8
D SUFFIX
CASE 751
1
3x151
ALYWG
G
MC3x151
x
A
WL, L
YY, Y
WW, W
G or
G
1
8
3151V
ALYWG
G
MC3x151P
AWL
YYWWG
8
•
•
•
•
•
•
•
Two Independent Channels with 1.5 A Totem Pole Output
Output Rise and Fall Times of 15 ns with 1000 pF Load
CMOS/LSTTL Compatible Inputs with Hysteresis
Undervoltage Lockout with Hysteresis
Low Standby Current
Efficient High Frequency Operation
Enhanced System Performance with Common Switching Regulator
Control ICs
•
Pin Out Equivalent to DS0026 and MMH0026
•
These are Pb−Free and Halide−Free Devices
V
CC
6
+
+
+
+
Logic Input A
100k
2
Drive Output A
7
-
5.7V
+
1
MC33151V
= 3 or 4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
N.C. 1
Logic Input A 2
GND 3
Logic Input B 4
(Top View)
8 N.C.
7 Drive Output A
6 V
CC
5 Drive Output B
ORDERING INFORMATION
+
+
Logic Input B
4
100k
Drive Output B
5
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
GND
3
Figure 1. Representative Block Diagram
©
Semiconductor Components Industries, LLC, 2013
August, 2013
−
Rev. 9
1
Publication Order Number:
MC34151/D
MC34151, MC33151
MAXIMUM RATINGS
Rating
Power Supply Voltage
Logic Inputs (Note 1)
Drive Outputs (Note 2)
Totem Pole Sink or Source Current
Diode Clamp Current (Drive Output to V
CC
)
Power Dissipation and Thermal Characteristics
D Suffix SOIC−8 Package Case 751
Maximum Power Dissipation @ T
A
= 50°C
Thermal Resistance, Junction−to−Air
P Suffix 8−Pin Package Case 626
Maximum Power Dissipation @ T
A
= 50°C
Thermal Resistance, Junction−to−Air
Operating Junction Temperature
Operating Ambient Temperature
MC34151
MC33151
MC33151V
Storage Temperature Range
Electrostatic Discharge Sensitivity (ESD) (Note 3)
Human Body Model (HBM)
Machine Model (MM)
Charged Device Model (CDM)
Symbol
V
CC
V
in
I
O
Value
20
−0.3
to V
CC
1.5
1.0
Unit
V
V
A
I
O(clamp)
P
D
R
qJA
P
D
R
qJA
T
J
T
A
0.56
180
1.0
100
+150
0 to +70
−40
to +85
−40
to +125
−65
to +150
2000
200
1500
W
°C/W
W
°C/W
°C
°C
T
stg
ESD
°C
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. For optimum switching speed, the maximum input voltage should be limited to 10 V or V
CC
, whichever is less.
2. Maximum package power dissipation limits must be observed.
3. ESD protection per JEDEC Standard JESD22−A114−F for HBM
per JEDEC Standard JESD22−A115−A for MM
per JEDEC Standard JESD22−C101D for CDM.
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2
MC34151, MC33151
ELECTRICAL CHARACTERISTICS
(V
CC
= 12 V, for typical values T
A
= 25°C, for min/max values T
A
is the only operating
ambient temperature range that applies [Note 3], unless otherwise noted.)
Characteristics
LOGIC INPUTS
Input Threshold Voltage
−
Input Current
−
High State (V
IH
= 2.6 V)
Input Current
−
Low State (V
IL
= 0.8 V)
DRIVE OUTPUT
Output Voltage
−
Low State (I
Sink
= 10 mA)
Output Voltage
−
Low State
(I
Sink
= 50 mA)
Output Voltage
−
Low State
(I
Sink
= 400 mA)
Output Voltage
−
High State (I
Source
= 10 mA)
Output Voltage
−
High State
(I
Source
= 50 mA)
Output Voltage
−
High State
(I
Source
= 400 mA)
Output Pulldown Resistor
SWITCHING CHARACTERISTICS
(T
A
= 25°C)
Propagation Delay (10% Input to 10% Output, C
L
= 1.0 nF)
Logic Input to Drive Output Rise
Logic Input to Drive Output Fall
Drive Output Rise Time (10% to 90%) C
L
= 1.0 nF
Drive Output Rise Time (10% to 90%)
C
L
= 2.5 nF
Drive Output Fall Time (90% to 10%) C
L
= 1.0 nF
Drive Output Fall Time (90% to 10%)
C
L
= 2.5 nF
TOTAL DEVICE
Power Supply Current
Standby (Logic Inputs Grounded)
Operating (C
L
= 1.0 nF Drive Outputs 1 and 2, f = 100 kHz)
Operating Voltage
I
CC
mA
−
−
6.5
6.0
10.5
−
10
15
18
V
ns
t
PLH(in/out)
t
PHL(in/out)
t
r
t
f
−
−
−
−
−
−
35
36
14
31
16
32
100
100
30
−
30
−
ns
ns
V
OL
V
OH
−
−
−
10.5
10.4
9.5
−
0.8
1.1
1.7
11.2
11.1
10.9
100
1.2
1.5
2.5
−
−
−
−
V
Output Transition High to Low State
Output Transition Low to High State
V
IH
V
IL
I
IH
I
IL
−
0.8
−
−
1.75
1.58
200
20
2.6
−
500
100
V
mA
Symbol
Min
Typ
Max
Unit
R
PD
kW
V
CC
1. For optimum switching speed, the maximum input voltage should be limited to 10 V or V
CC
, whichever is less.
2. Maximum package power dissipation limits must be observed.
T
high
= +70°C for MC34151
3. T
low
= 0°C for MC34151
−40°C
for MC33151
+85°C for MC33151
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3
MC34151, MC33151
12
4.7 V 0.1
+
6
+
+
+
Logic Input
50
+
+
4
100k
5
t
PHL
90%
Drive Output
3
t
f
10%
t
r
2
100k
+
-
5.7V
7
C
L
5.0 V
Logic Input
t
r
, t
f
≤
10 ns
0V
90%
10%
t
PLH
+
Drive Output
Figure 2. Switching Characteristics Test Circuit
2.4
V th , INPUT THRESHOLD VOLTAGE (V)
I in , INPUT CURRENT (mA)
2.0
1.6
1.2
0.8
0.4
0
0
2.0
4.0
6.0
8.0
V
in
, INPUT VOLTAGE (V)
10
12
V
CC
= 12 V
T
A
= 25°C
2.2
Figure 3. Switching Waveform Definitions
V
CC
= 12 V
2.0
1.8
1.6
1.4
1.2
1.0
-55
Lower Threshold
High State Output
Upper Threshold
Low State Output
-25
0
25
50
75
T
A
, AMBIENT TEMPERATURE (°C)
100
125
Figure 4. Logic Input Current versus
Input Voltage
t PLH(IN/OUT) , DRIVE OUTPUT PROPAGATION DELAY (ns)
200
160
120
80
40
V
th(lower)
0
-1.6
-1.2
-0.8
-0.4
0
V
in
, INPUT OVERDRIVE VOLTAGE BELOW LOWER THRESHOLD (V)
V
CC
= 12 V
C
L
= 1.0 nF
T
A
= 25°C
Overdrive Voltage is with Respect
to the Logic Input Lower Threshold
t PHL(IN/OUT) , DRIVE OUTPUT PROPAGATION DELAY (ns)
200
Figure 5. Logic Input Threshold Voltage
versus Temperature
Overdrive Voltage is with Respect
to the Logic Input Lower Threshold
160
120
80
40
0
V
th(upper)
V
CC
= 12 V
C
L
= 1.0 nF
T
A
= 25°C
0
1.0
2.0
3.0
4.0
V
in
, INPUT OVERDRIVE VOLTAGE ABOVE UPPER THRESHOLD (V)
Figure 6. Drive Output Low−to−High Propagation
Delay versus Logic Overdrive Voltage
Figure 7. Drive Output High−to−Low Propagation
Delay versus Logic Input Overdrive Voltage
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4
MC34151, MC33151
V clamp , OUTPUT CLAMP VOLTAGE (V)
3.0
2.0
1.0
V
CC
0
0
GND
-1.0
50 ns/DIV
0
0.2
Low State Clamp
(Drive Output Driven Below Ground)
1.2
1.4
High State Clamp
(Drive Output Driven Above V
CC
)
90%
Logic Input
V
CC
= 12 V
V
in
= 5 V to 0 V
C
L
= 1.0 nF
T
A
= 25°C
V
CC
= 12 V
80
ms
Pulsed Load
120 Hz Rate
T
A
= 25°C
10%
Drive Output
0.4
0.6
0.8
1.0
I
O
, OUTPUT LOAD CURRENT (A)
Figure 8. Propagation Delay
Figure 9. Drive Output Clamp Voltage
versus Clamp Current
V sat , OUTPUT SATURATION VOLTAGE(V)
-1.0
-2.0
-3.0
3.0
2.0
1.0
0
0
0.2
V
CC
Source Saturation V
CC
= 12 V
(Load to Ground) 80
ms
Pulsed Load
120 Hz Rate
T
A
= 25°C
V sat , OUTPUT SATURATION VOLTAGE(V)
0
0
-0.5
-0.7
-0.9
-1.1
1.9
1.7
Source Saturation
(Load to Ground) V
CC
I
source
= 10 mA
I
source
= 400 mA
V
CC
= 12 V
I
sink
= 400 mA
Sink Saturation
(Load to V
CC
)
GND
1.2
1.4
0.4
0.6
0.8
1.0
I
O
, OUTPUT LOAD CURRENT (A)
1.5
1.0
I
sink
= 10 mA
0.8
GND
Sink Saturation
0.6
(Load to V
CC
)
0
-55
-25
0
25
50
75
T
A
, AMBIENT TEMPERATURE (°C)
100
125
Figure 10. Drive Output Saturation Voltage
versus Load Current
Figure 11. Drive Output Saturation Voltage
versus Temperature
90%
90%
V
CC
= 12 V
V
in
= 5 V to 0 V
C
L
= 1.0 nF
T
A
= 25°C
10%
V
CC
= 12 V
V
in
= 5 V to 0 V
C
L
= 1.0 nF
T
A
= 25°C
10%
10 ns/DIV
10 ns/DIV
Figure 12. Drive Output Rise Time
Figure 13. Drive Output Fall Time
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