SN8P2714X_2715
8-bit micro-controller build-in 12-bit ADC
SN8P2714X_2715
USER’S MANUAL
V1.4
SN8P2714
SN8P27142
SN8P27143
SN8P2715
SONiX 8-Bit Micro-Controller
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.
SONiX TECHNOLOGY CO., LTD
Page 1
V1.4
SN8P2714X_2715
8-bit micro-controller build-in 12-bit ADC
AMENDMENT HISTORY
Version
VER 0.1
VER 0.2
Date
Aug. 2004
Jan. 2005
Description
Preliminary Version first issue
1. Add SN8P27142/ SN8P27143 relative data.
2. Fix ADC clock and Timer clock description.
3. Add LVD36 relative information.
4. Correct the LVD24 bit location from bit 3 to bit 4 in PFLAG register description.
5. Modify LVD code option related description
6. Modify TC0RATE and TC1RATE table.
7. Add TC0X8 and TC1X8 notice.
8. Release the ROM address 0x04 ~ 0x07 as general-purpose area.
9. Remove the instruction limitation at interrupt vector address (0x08)
10. Change IDE support version to M2IDE V1.04
11. Modify pin circuit diagram.
12. There is no Schmitt trigger input in port 4.
13. Add description of P0.3 without wakeup function
1. Modify Zero flag description.
2. In instruction set table, change “S = 0”, otherwise “S = 1” to “S = 1”, otherwise “S =
0”
3. Fix ADC conversion time formula.
4. Remove “Note:For 12-bit resolution the conversion time is 16 steps”.
5. Remove “Note: Please use "@RST_WDT" macro to clear the watchdog timer
successfully both in S8KD-2 ICE emulation and real chip.”
6. Modify watchdog reset section
7. Fixed the slow mode current of electrical characteristic table.
1. Modify Programming Pin Mapping.
2. Modify PROGRAM CHECK LIST.
3. Modify P13 AVREF pin description
4. Modify 27142/143 pin assignment.
5. Modify P57,P66 TC0RATE、TC1RATE.
6.
7.
8.
1.
2.
1.
2.
1.
2.
3.
4.
5.
6.
7.
1.
2.
3.
1.
2.
Modify P57,P66:TC0X8=1 Fosc/2~Fosc/256 to Fosc/1~Fosc/128
Modify P107 SLOW Mode Current.
ADD P97 “Note”.
ADD Brown-Out reset circuit.
Working Voltage vs. Frequency graphs.
ADD ADC current.
Modify Topr value.
Remove 32k mode.
Modify P108 SN8P271XAXD to SN8P271XXD.
Modify P52 wakeup trigger signal.
Remove CHARACTERISTIC GRAPHS.
Modify reset section.
Limit Fcpu=Fosc/4~./8 when Noise Filter enable
Remove Pc
Modify 15.2 STANDARD ELECTRICAL CHARACTERISTIC.
Add 15.3 CHARACTERISTIC GRAPHS.
Add chapter17 Marking Definition.
Modify ELECTRICAL CHARACTERISTIC.
Modify RST/P0.3/VPP PIN DISCRIPTION.
VER 0.3
Mar. 2005
VER 1.0
Sept 2005
Nov.2005
VER 1.1
VER 1.2
Nov.2005
Dec.2005
VER 1.3
VER 1.4
Sep.2006
Feb 2007
SONiX TECHNOLOGY CO., LTD
Page 2
V1.4
SN8P2714X_2715
8-bit micro-controller build-in 12-bit ADC
Table of Contents
AMENDMENT HISTORY .............................................................................................................. 2
1 PRODUCT OVERVIEW................................................................................................................. 8
1.1 FEATURES
OF
SN8P2710 S
ERIES
........................................................................................... 8
1.2 SYSTEM BLOCK DIAGRAM ................................................................................................. 10
1.3 PIN ASSIGNMENT................................................................................................................ 11
1.3.1 SN8P27142 Pin Assignment .......................................................................................... 11
1.3.2 SN8P27143 Pin Assignment .......................................................................................... 11
1.3.3 SN8P2714K Pin Assignment .......................................................................................... 12
1.3.4 SN8P2715P Pin Assignment .......................................................................................... 12
1.4 PIN DESCRIPTIONS............................................................................................................. 13
1.5 PIN CIRCUIT DIAGRAMS ..................................................................................................... 14
2 CODE OPTION TABLE............................................................................................................... 15
3 ADDRESS SPACES ................................................................................................................... 16
3.1 PROGRAM MEMORY (ROM) ............................................................................................... 16
3.1.1 OVERVIEW .................................................................................................................... 16
3.1.2 USER RESET VECTOR ADDRESS (0000H)................................................................. 17
3.1.3 INTERRUPT VECTOR ADDRESS (0008H) ................................................................... 17
3.1.4 GENERAL PURPOSE PROGRAM MEMORY AREA..................................................... 19
3.1.5 LOOKUP TABLE DESCRIPTION................................................................................... 19
3.1.6 JUMP TABLE DESCRIPTION ........................................................................................ 21
3.2 DATA MEMORY (RAM)......................................................................................................... 23
3.2.1 OVERVIEW .................................................................................................................... 23
3.3 WORKING REGISTERS ....................................................................................................... 24
3.3.1 Y, Z REGISTERS ........................................................................................................... 24
3.3.2 R REGISTERS ............................................................................................................... 25
3.4 PROGRAM FLAG.................................................................................................................. 25
3.4.1 RESET FLAG ................................................................................................................. 25
3.4.2 LVD 2.4V FLAG.............................................................................................................. 25
3.4.3 LVD 3.6V FLAG.............................................................................................................. 25
3.4.4 CARRY FLAG................................................................................................................. 26
3.4.5 DECIMAL CARRY FLAG................................................................................................ 26
3.4.6 ZERO FLAG ................................................................................................................... 26
3.5 ACCUMULATOR................................................................................................................... 27
3.6 STACK OPERATIONS .......................................................................................................... 28
3.6.1 OVERVIEW .................................................................................................................... 28
SONiX TECHNOLOGY CO., LTD
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V1.4
SN8P2714X_2715
8-bit micro-controller build-in 12-bit ADC
3.6.2 STACK REGISTERS...................................................................................................... 29
3.6.3 STACK OPERATION EXAMPLE.................................................................................... 30
3.7 PROGRAM COUNTER ......................................................................................................... 31
3.7.1 ONE ADDRESS SKIPPING ........................................................................................... 32
3.7.2 MULTI-ADDRESS JUMPING ......................................................................................... 33
4 ADDRESSING MODE ................................................................................................................. 34
4.1 OVERVIEW........................................................................................................................... 34
4.1.1 IMMEDIATE ADDRESSING MODE ............................................................................... 34
4.1.2 DIRECTLY ADDRESSING MODE ................................................................................. 34
4.1.3 INDIRECTLY ADDRESSING MODE.............................................................................. 34
4.1.4 TO ACCESS DATA in RAM BANK 0.............................................................................. 35
5 SYSTEM REGISTER................................................................................................................... 36
5.1 OVERVIEW........................................................................................................................... 36
5.2 SYSTEM REGISTER ARRANGEMENT (BANK 0) ................................................................ 36
5.2.1 BYTES of SYSTEM REGISTER..................................................................................... 36
5.2.2 BITS of SYSTEM REGISTER ........................................................................................ 37
6 RESET......................................................................................................................................... 39
6.1 OVERVIEW........................................................................................................................... 39
6.2 POWER ON RESET.............................................................................................................. 40
6.3 WATCHDOG RESET ............................................................................................................ 40
6.4 BROWN OUT RESET ........................................................................................................... 41
6.4.1 BROWN OUT DESCRIPTION........................................................................................ 41
6.4.2 THE SYSTEM OPERATING VOLTAGE DECSRIPTION ............................................... 42
6.4.3 BROWN OUT RESET IMPROVEMENT......................................................................... 42
6.5 EXTERNAL RESET............................................................................................................... 44
6.6 EXTERNAL RESET CIRCUIT ............................................................................................... 44
6.6.1 Simply RC Reset Circuit ................................................................................................. 44
6.6.2 Diode & RC Reset Circuit ............................................................................................... 45
6.6.3 Zener Diode Reset Circuit .............................................................................................. 45
6.6.4 Voltage Bias Reset Circuit.............................................................................................. 46
6.6.5 External Reset IC ........................................................................................................... 47
7 OSCILLATORS........................................................................................................................... 48
7.1 OVERVIEW........................................................................................................................... 48
7.1.1 OSCM REGISTER DESCRIPTION ................................................................................ 49
7.1.2 EXTERNAL HIGH-SPEED OSCILLATOR...................................................................... 49
7.1.3 HIGH CLOCK OSCILLATOR CODE OPTION ............................................................... 49
7.1.4 SYSTEM OSCILLATOR CIRCUITS ............................................................................... 50
SONiX TECHNOLOGY CO., LTD
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V1.4
SN8P2714X_2715
8-bit micro-controller build-in 12-bit ADC
7.1.5 External RC Oscillator Frequency Measurement............................................................ 51
7.2 INTERNAL LOW-SPEED OSCILLATOR............................................................................... 52
7.3 SYSTEM MODE DESCRIPTION........................................................................................... 53
7.3.1 OVERVIEW .................................................................................................................... 53
7.3.2 NORMAL MODE ............................................................................................................ 53
7.3.3 SLOW MODE ................................................................................................................. 53
7.3.4 POWER DOWN (SLEEP) MODE ................................................................................... 53
7.4 SYSTEM MODE CONTROL.................................................................................................. 54
7.4.1 SN8P2710 SYSTEM MODE BLOCK DIAGRAM ............................................................ 54
7.4.2 SYSTEM MODE SWITCHING ....................................................................................... 55
7.5 WAKEUP TIME ..................................................................................................................... 56
7.5.1 OVERVIEW .................................................................................................................... 56
7.5.2 HARDWARE WAKEUP .................................................................................................. 56
8 TIMERS COUNTERS .................................................................................................................. 57
8.1 WATCHDOG TIMER (WDT).................................................................................................. 57
8.2 TIMER COUNTER 0 (TC0) .................................................................................................... 58
8.2.1 OVERVIEW .................................................................................................................... 58
8.2.2 TC0M MODE REGISTER............................................................................................... 59
8.2.3 TC0C COUNTING REGISTER....................................................................................... 61
8.2.4 TC0R AUTO-LOAD REGISTER ..................................................................................... 63
8.2.5 TC0 TIMER COUNTER OPERATION SEQUENCE....................................................... 64
8.2.6 TC0 CLOCK FREQUENCY OUTPUT (BUZZER)........................................................... 66
8.3 TIMER COUNTER 1 (TC1) .................................................................................................... 67
8.3.1 OVERVIEW .................................................................................................................... 67
8.3.2 TC1M MODE REGISTER............................................................................................... 68
8.3.3 TC1C COUNTING REGISTER....................................................................................... 70
8.3.4 TC1R AUTO-LOAD REGISTER ..................................................................................... 72
8.3.5 TC1 TIMER COUNTER OPERATION SEQUENCE....................................................... 73
8.3.6 TC1 CLOCK FREQUENCY OUTPUT (BUZZER)........................................................... 75
8.4 PWM FUNCTION DESCRIPTION ......................................................................................... 76
8.4.1 OVERVIEW .................................................................................................................... 76
8.4.2 PWM PROGRAM DESCRIPTION.................................................................................. 77
8.4.3 PWM Duty with TCxR changing ..................................................................................... 78
8.4.4 TCxIRQ and PWM Duty ................................................................................................. 79
9 INTERRUPT ................................................................................................................................ 80
9.1 OVERVIEW........................................................................................................................... 80
9.2 INTEN INTERRUPT ENABLE REGISTER ............................................................................ 80
9.3 INTRQ INTERRUPT REQUEST REGISTER......................................................................... 81
SONiX TECHNOLOGY CO., LTD
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V1.4
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