SN8P2711B
5+1-ch 12-bit SAR ADC 8-Bit Micro-Controller
SN8P2711B
USER’S MANUAL
Version 2.4
SN8P2711B
SN8P27113B
SN8P271101B
SN8P271102B
SN8P271108B
SONiX 8-Bit Micro-Controller
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.
SONiX TECHNOLOGY CO., LTD
Page 1
Version 2.4
SN8P2711B
5+1-ch 12-bit SAR ADC 8-Bit Micro-Controller
AMENDENT HISTORY
Version
VER 1.0
VER 1.1
VER 1.2
VER 1.3
VER 1.4
VER 1.5
Date
Apr. 2012
Oct. 2012
Oct. 2012
Feb. 2013
Mar. 2013
Jul. 2013
Description
First issue.
Modify ADC Electrical characteristic with 1/4*VDD AIN channel input voltage range.
Modify “Migration SN8P2711A to SN8P2711B” description.
Add Package Type: SN8P27113BA (MSOP10)
Delect Fosc Code Option : IHRC_RTC.
1.
Modify “ELECTRICAL CHARACTERICS” chapter operating temperature from 0~70
℃
to -20~85℃ and others.
2.
Modify “ELECTRICAL CHARACTERICS” chapter LVD voltage range to meet
SN8P2711A.
Modify “MARKING DEFINITION” chapter about MSOP.
Modify registers: ADR/P4CON/P0 property.
Add SN8P27113BA name.
Add SN8P271108BA new pin assignment and description.
Modify electrical characteristic section.
Delete ADLEN bit description.
Add SN8P2711BX new pin assignment and description.
Add SN8P271101BP/SN8P271102BP/ SN8P271102BS new pin assignment and
description.
Modify Chapter 14.2 & 14.3 about Marking indetification system & Marking example.
VER 1.6
VER 1.7
VER 1.8
VER 1.9
VER 2.0
VER 2.1
VER 2.2
VER 2.3
VER 2.4
Aug. 2013
Aug. 2013
Apr. 2015
Jul. 2015
Aug. 2015
Jan. 2016
Jul. 2016
Jul. 2016
Nov. 2016
SONiX TECHNOLOGY CO., LTD
Page 2
Version 2.4
SN8P2711B
5+1-ch 12-bit SAR ADC 8-Bit Micro-Controller
Table of Content
AMENDENT HISTORY ................................................................................................................................ 2
1
1
PRODUCT OVERVIEW ......................................................................................................................... 7
1.1
1.2
1.3
1.4
1.5
2
2
FEATURES ........................................................................................................................................ 7
SYSTEM BLOCK DIAGRAM .......................................................................................................... 8
PIN ASSIGNMENT ........................................................................................................................... 9
PIN DESCRIPTIONS ....................................................................................................................... 11
PIN CIRCUIT DIAGRAMS ............................................................................................................. 11
CENTRAL PROCESSOR UNIT (CPU) .............................................................................................. 13
2.1
PROGRAM MEMORY (ROM) ....................................................................................................... 13
2.1.1
RESET VECTOR (0000H) ...................................................................................................... 14
2.1.2
INTERRUPT VECTOR (0008H) ............................................................................................. 15
2.1.3
LOOK-UP TABLE DESCRIPTION ........................................................................................ 17
2.1.4
JUMP TABLE DESCRIPTION ............................................................................................... 19
2.1.5
CHECKSUM CALCULATION............................................................................................... 21
2.2
DATA MEMORY (RAM) ................................................................................................................ 22
2.2.1
SYSTEM REGISTER .............................................................................................................. 22
2.2.1.1 SYSTEM REGISTER TABLE ............................................................................................ 22
2.2.1.2 SYSTEM REGISTER DESCRIPTION ............................................................................... 22
2.2.1.3 BIT DEFINITION of SYSTEM REGISTER ....................................................................... 23
2.2.2
ACCUMULATOR ................................................................................................................... 24
2.2.3
PROGRAM FLAG ................................................................................................................... 25
2.2.4
PROGRAM COUNTER........................................................................................................... 26
2.2.5
Y, Z REGISTERS..................................................................................................................... 28
2.2.6
R REGISTER ........................................................................................................................... 28
2.3
ADDRESSING MODE .................................................................................................................... 29
2.3.1
IMMEDIATE ADDRESSING MODE .................................................................................... 29
2.3.2
DIRECTLY ADDRESSING MODE ....................................................................................... 29
2.3.3
INDIRECTLY ADDRESSING MODE ................................................................................... 29
2.4
STACK OPERATION ...................................................................................................................... 30
2.4.1
OVERVIEW ............................................................................................................................. 30
2.4.2
STACK REGISTERS ............................................................................................................... 30
2.4.3
STACK OPERATION EXAMPLE.......................................................................................... 31
2.5
CODE OPTION TABLE .................................................................................................................. 32
2.5.1
Fcpu code option ...................................................................................................................... 32
2.5.2
Reset_Pin code option .............................................................................................................. 32
2.5.3
Security code option ................................................................................................................. 32
2.5.4
Noise Filter code option ........................................................................................................... 32
3
3
RESET ..................................................................................................................................................... 33
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
OVERVIEW ..................................................................................................................................... 33
POWER ON RESET......................................................................................................................... 34
WATCHDOG RESET ...................................................................................................................... 34
BROWN OUT RESET ..................................................................................................................... 34
THE SYSTEM OPERATING VOLTAGE ....................................................................................... 35
LOW VOLTAGE DETECTOR (LVD) ............................................................................................ 35
BROWN OUT RESET IMPROVEMENT ....................................................................................... 37
EXTERNAL RESET ........................................................................................................................ 38
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SONiX TECHNOLOGY CO., LTD
Version 2.4
SN8P2711B
5+1-ch 12-bit SAR ADC 8-Bit Micro-Controller
3.9
EXTERNAL RESET CIRCUIT ....................................................................................................... 38
3.9.1
Simply RC Reset Circuit .......................................................................................................... 38
3.9.2
Diode & RC Reset Circuit ........................................................................................................ 39
3.9.3
Zener Diode Reset Circuit ........................................................................................................ 39
3.9.4
Voltage Bias Reset Circuit ....................................................................................................... 40
3.9.5
External Reset IC ...................................................................................................................... 40
4
4
SYSTEM CLOCK .................................................................................................................................. 41
4.1
OVERVIEW ..................................................................................................................................... 41
4.2
F
CPU
(INSTRUCTION CYCLE) ...................................................................................................... 41
4.3
NOISE FILTER ................................................................................................................................ 41
4.4
SYSTEM HIGH-SPEED CLOCK .................................................................................................... 42
4.4.1
HIGH_CLK CODE OPTION ................................................................................................... 42
4.4.2
INTERNAL HIGH-SPEED OSCILLATOR RC TYPE (IHRC) ............................................. 42
4.4.3
EXTERNAL HIGH-SPEED OSCILLATOR ........................................................................... 42
4.4.4
EXTERNAL OSCILLATOR APPLICATION CIRCUIT ....................................................... 42
4.5
SYSTEM LOW-SPEED CLOCK ..................................................................................................... 43
4.6
OSCM REGISTER ........................................................................................................................... 44
4.7
SYSTEM CLOCK MEASUREMENT ............................................................................................. 44
4.8
SYSTEM CLOCK TIMING ............................................................................................................. 45
5
5
SYSTEM OPERATION MODE ........................................................................................................... 48
5.1
OVERVIEW ..................................................................................................................................... 48
5.2
NORMAL MODE ............................................................................................................................ 49
5.3
SLOW MODE .................................................................................................................................. 49
5.4
POWER DOWN MODE .................................................................................................................. 49
5.5
GREEN MODE ................................................................................................................................ 50
5.6
OPERATING MODE CONTROL MACRO .................................................................................... 51
5.7
WAKEUP ......................................................................................................................................... 52
5.7.1
OVERVIEW ............................................................................................................................. 52
5.7.2
WAKEUP TIME ...................................................................................................................... 52
6
6
INTERRUPT ........................................................................................................................................... 53
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
7
7
7.1
7.2
7.3
7.4
7.5
8
8
OVERVIEW ..................................................................................................................................... 53
INTEN INTERRUPT ENABLE REGISTER ................................................................................... 54
INTRQ INTERRUPT REQUEST REGISTER ................................................................................ 55
GIE GLOBAL INTERRUPT OPERATION .................................................................................... 56
PUSH, POP ROUTINE..................................................................................................................... 57
EXTERNAL INTERRUPT OPERATION (INT0) ........................................................................... 58
INT1 (P0.1) INTERRUPT OPERATION ......................................................................................... 59
TC0 INTERRUPT OPERATION ..................................................................................................... 60
TC1 INTERRUPT OPERATION ..................................................................................................... 61
ADC INTERRUPT OPERATION ................................................................................................... 62
MULTI-INTERRUPT OPERATION ............................................................................................... 63
OVERVIEW ..................................................................................................................................... 64
I/O PORT MODE ............................................................................................................................. 65
I/O PULL UP REGISTER ................................................................................................................ 66
I/O PORT DATA REGISTER .......................................................................................................... 67
PORT 0/4 ADC SHARE PIN ............................................................................................................ 68
I/O PORT ................................................................................................................................................ 64
TIMERS .................................................................................................................................................. 71
SONiX TECHNOLOGY CO., LTD
Page 4
Version 2.4
SN8P2711B
5+1-ch 12-bit SAR ADC 8-Bit Micro-Controller
8.1
WATCHDOG TIMER ...................................................................................................................... 71
8.2
TIMER/COUNTER 0 (TC0) ............................................................................................................ 73
8.2.1
OVERVIEW ............................................................................................................................. 73
8.2.2
TC0 TIMER OPERATION ...................................................................................................... 74
8.2.3
TC0M MODE REGISTER ....................................................................................................... 75
8.2.4
TC0X8, TC0GN FLAGS .......................................................................................................... 76
8.2.5
TC0C COUNTING REGISTER .............................................................................................. 76
8.2.6
TC0R AUTO-LOAD REGISTER ............................................................................................ 77
8.2.7
TC0 EVENT COUNTER FUNCTION .................................................................................... 78
8.2.8
TC0 CLOCK FREQUENCY OUTPUT (BUZZER)................................................................ 78
8.2.9
PULSE WIDTH MODULATION (PWM) .............................................................................. 79
8.2.10
TC0 TIMER OPERATION EXPLAME .................................................................................. 81
8.3
TIMER/COUNTER 1 (TC1) ............................................................................................................ 83
8.3.1
OVERVIEW ............................................................................................................................. 83
8.3.2
TC1 TIMER OPERATION ...................................................................................................... 84
8.3.3
TC1M MODE REGISTER ....................................................................................................... 85
8.3.4
TC1X8 FLAG ........................................................................................................................... 86
8.3.5
TC1C COUNTING REGISTER .............................................................................................. 86
8.3.6
TC1R AUTO-LOAD REGISTER ............................................................................................ 87
8.3.7
TC1 EVENT COUNTER FUNCTION .................................................................................... 88
8.3.8
TC1 CLOCK FREQUENCY OUTPUT (BUZZER)................................................................ 88
8.3.9
PULSE WIDTH MODULATION (PWM) .............................................................................. 89
8.3.10
TC1 TIMER OPERATION EXPLAME .................................................................................. 91
9
9
5+1 CHANNEL ANALOG TO DIGITAL CONVERTER ................................................................. 93
9.1
OVERVIEW ..................................................................................................................................... 93
9.2
ADC MODE REGISTER ................................................................................................................. 94
9.3
ADC DATA BUFFER REGISTERS ................................................................................................ 95
9.4
ADC REFERENCE VOLTAGE REGISTER................................................................................... 96
9.5
ADC OPERATION DESCRIPTION AND NOTIC ......................................................................... 96
9.5.1
ADC SIGNAL FORMAT ........................................................................................................ 96
9.5.2
ADC CONVERTING TIME .................................................................................................... 97
9.5.3
ADC PIN CONFIGURATION ................................................................................................ 98
9.6
ADC OPERATION EXAMLPE ....................................................................................................... 99
9.7
ADC
APPLICATION
CIRCUIT ......................................................................................................... 101
10
10
11
11
11.1
11.2
11.3
12
12
12.1
12.2
13
13
13.1
13.2
14
14
14.1
INSTRUCTION TABLE ................................................................................................................. 102
ELECTRICAL CHARACTERISTIC ............................................................................................ 103
ABSOLUTE MAXIMUM RATING .............................................................................................. 103
ELECTRICAL CHARACTERISTIC ............................................................................................. 103
CHARACTERISTIC GRAPHS ..................................................................................................... 105
DEVELOPMENT TOOL ................................................................................................................ 106
SN8P2711B EV-
KIT
....................................................................................................................... 106
ICE
AND
EV-KIT APPLICATION NOTIC .................................................................................... 109
OTP PROGRAMMING PIN ........................................................................................................... 110
WRITER TRANSITION BOARD SOCKET PIN ASSIGNMENT ............................................... 110
PROGRAMMING PIN MAPPING: ............................................................................................... 111
MARKING DEFINITION ............................................................................................................... 113
INTRODUCTION .......................................................................................................................... 113
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SONiX TECHNOLOGY CO., LTD
Version 2.4