SN8P2501D
8-Bit Micro-Controller
SN8P2501D
USER’S MANUAL
Version 1.3
SN8P2501D
SONiX 8-Bit Micro-Controller
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.
SONiX TECHNOLOGY CO., LTD
Page 1
Version 1.3
SN8P2501D
8-Bit Micro-Controller
AMENDENT HISTORY
Version
VER 1.0
VER 1.1
VER 1.2
VER 1.3
Date
Nov. 2013
Oct. 2014
Mar. 2015
Jan. 2016
Description
First issue.
Modify system clock timing section.
Modify operating voltage.
Add SN8P2501D is compatible to SN8P2511 description.
SONiX TECHNOLOGY CO., LTD
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Version 1.3
SN8P2501D
8-Bit Micro-Controller
Table of Content
1
1
AMENDENT HISTORY ................................................................................................................................ 2
PRODUCT OVERVIEW ......................................................................................................................... 6
1.1
FEATURES ........................................................................................................................................ 6
1.2
SYSTEM BLOCK DIAGRAM .......................................................................................................... 7
1.3
PIN ASSIGNMENT ........................................................................................................................... 7
1.4
PIN DESCRIPTIONS ......................................................................................................................... 8
1.5
PIN CIRCUIT DIAGRAMS ............................................................................................................... 9
CENTRAL PROCESSOR UNIT (CPU) .............................................................................................. 10
2.1
PROGRAM MEMORY (ROM) ....................................................................................................... 10
2.1.1
RESET VECTOR (0000H) ...................................................................................................... 11
2.1.2
INTERRUPT VECTOR (0008H) ............................................................................................. 12
2.1.3
LOOK-UP TABLE DESCRIPTION ........................................................................................ 14
2.1.4
JUMP TABLE DESCRIPTION ............................................................................................... 16
2.1.5
CHECKSUM CALCULATION............................................................................................... 18
2.2
DATA MEMORY (RAM) ................................................................................................................ 19
2.2.1
SYSTEM REGISTER .............................................................................................................. 19
2.2.1.1 SYSTEM REGISTER TABLE ............................................................................................ 19
2.2.1.2 SYSTEM REGISTER DESCRIPTION ............................................................................... 19
2.2.1.3 BIT DEFINITION of SYSTEM REGISTER ....................................................................... 20
2.2.2
ACCUMULATOR ................................................................................................................... 21
2.2.3
PROGRAM FLAG ................................................................................................................... 22
2.2.4
PROGRAM COUNTER........................................................................................................... 23
2.2.5
Y, Z REGISTERS..................................................................................................................... 25
2.2.6
R REGISTER ........................................................................................................................... 25
2.3
ADDRESSING MODE .................................................................................................................... 26
2.3.1
IMMEDIATE ADDRESSING MODE .................................................................................... 26
2.3.2
DIRECTLY ADDRESSING MODE ....................................................................................... 26
2.3.3
INDIRECTLY ADDRESSING MODE ................................................................................... 26
2.4
STACK OPERATION ...................................................................................................................... 27
2.4.1
OVERVIEW ............................................................................................................................. 27
2.4.2
STACK REGISTERS ............................................................................................................... 27
2.4.3
STACK OPERATION EXAMPLE.......................................................................................... 28
2.5
CODE OPTION TABLE .................................................................................................................. 29
2.5.1
Fcpu code option ...................................................................................................................... 29
2.5.2
Reset_Pin code option .............................................................................................................. 29
2.5.3
Security code option ................................................................................................................. 29
2.5.4
Noise Filter code option ........................................................................................................... 29
RESET ..................................................................................................................................................... 30
3.1
OVERVIEW ..................................................................................................................................... 30
3.2
POWER ON RESET......................................................................................................................... 31
3.3
WATCHDOG RESET ...................................................................................................................... 31
3.4
BROWN OUT RESET ..................................................................................................................... 31
3.5
THE SYSTEM OPERATING VOLTAGE ....................................................................................... 32
3.6
LOW VOLTAGE DETECTOR (LVD) ............................................................................................ 32
3.7
BROWN OUT RESET IMPROVEMENT ....................................................................................... 34
3.8
EXTERNAL RESET ........................................................................................................................ 35
3.9
EXTERNAL RESET CIRCUIT ....................................................................................................... 35
3.9.1
Simply RC Reset Circuit .......................................................................................................... 35
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Version 1.3
SN8P2501D
8-Bit Micro-Controller
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7
7
8
8
3.9.2
Diode & RC Reset Circuit ........................................................................................................ 36
3.9.3
Zener Diode Reset Circuit ........................................................................................................ 36
3.9.4
Voltage Bias Reset Circuit ....................................................................................................... 37
3.9.5
External Reset IC ...................................................................................................................... 37
SYSTEM CLOCK .................................................................................................................................. 38
4.1
OVERVIEW ..................................................................................................................................... 38
4.2
F
CPU
(INSTRUCTION CYCLE) ...................................................................................................... 38
4.3
NOISE FILTER ................................................................................................................................ 39
4.4
SYSTEM HIGH-SPEED CLOCK .................................................................................................... 39
4.4.1
HIGH_CLK CODE OPTION ................................................................................................... 39
4.4.2
INTERNAL HIGH-SPEED OSCILLATOR RC TYPE (IHRC) ............................................. 39
4.4.3
EXTERNAL HIGH-SPEED OSCILLATOR ........................................................................... 39
4.4.4
EXTERNAL OSCILLATOR APPLICATION CIRCUIT ....................................................... 40
4.5
SYSTEM LOW-SPEED CLOCK ..................................................................................................... 41
4.6
OSCM REGISTER ........................................................................................................................... 42
4.7
SYSTEM CLOCK MEASUREMENT ............................................................................................. 42
4.8
SYSTEM CLOCK TIMING ............................................................................................................. 43
SYSTEM OPERATION MODE ........................................................................................................... 46
5.1
OVERVIEW ..................................................................................................................................... 46
5.2
NORMAL MODE ............................................................................................................................ 47
5.3
SLOW MODE .................................................................................................................................. 47
5.4
POWER DOWN MODE .................................................................................................................. 47
5.5
GREEN MODE ................................................................................................................................ 48
5.6
OPERATING MODE CONTROL MACRO .................................................................................... 49
5.7
WAKEUP ......................................................................................................................................... 50
5.7.1
OVERVIEW ............................................................................................................................. 50
5.7.2
WAKEUP TIME ...................................................................................................................... 50
5.7.3
P1W WAKEUP CONTROL REGISTER ................................................................................ 51
INTERRUPT ........................................................................................................................................... 52
6.1
OVERVIEW ..................................................................................................................................... 52
6.2
INTEN INTERRUPT ENABLE REGISTER ................................................................................... 52
6.3
INTRQ INTERRUPT REQUEST REGISTER ................................................................................ 53
6.4
GIE GLOBAL INTERRUPT OPERATION .................................................................................... 53
6.5
PUSH, POP ROUTINE..................................................................................................................... 54
6.6
EXTERNAL INTERRUPT OPERATION (INT0) ........................................................................... 55
6.7
T0 INTERRUPT OPERATION........................................................................................................ 56
6.8
TC0 INTERRUPT OPERATION ..................................................................................................... 58
6.9
MULTI-INTERRUPT OPERATION ............................................................................................... 59
I/O PORT ................................................................................................................................................ 60
7.1
OVERVIEW ..................................................................................................................................... 60
7.2
I/O PORT MODE ............................................................................................................................. 61
7.3
I/O PULL UP REGISTER ................................................................................................................ 62
7.4
I/O OPEN-DRAIN REGISTER ........................................................................................................ 63
7.5
I/O PORT DATA REGISTER .......................................................................................................... 64
TIMERS .................................................................................................................................................. 65
8.1
WATCHDOG TIMER ...................................................................................................................... 65
8.2
TIMER 0 (T0) ................................................................................................................................... 67
8.2.1
OVERVIEW ............................................................................................................................. 67
8.2.2
T0 Timer Operation .................................................................................................................. 68
8.2.3
T0M MODE REGISTER ......................................................................................................... 69
8.2.4
T0C COUNTING REGISTER ................................................................................................. 69
8.2.5
T0 TIMER OPERATION EXPLAME ..................................................................................... 70
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Version 1.3
SN8P2501D
8-Bit Micro-Controller
8.3
TC0 8-BIT TIMER/COUNTER ....................................................................................................... 71
8.3.1
OVERVIEW ............................................................................................................................. 71
8.3.2
TC0 TIMER OPERATION ...................................................................................................... 72
8.3.3
TC0M MODE REGISTER ....................................................................................................... 73
8.3.4
TC0C COUNTING REGISTER .............................................................................................. 74
8.3.5
TC0R AUTO-RELOAD REGISTER ....................................................................................... 75
8.3.6
TC0 EVENT COUNTER ......................................................................................................... 76
8.3.7
TC0 BUZZER OUTPUT .......................................................................................................... 76
8.3.8
PULSE WIDTH MODULATION (PWM) .............................................................................. 77
8.3.9
TC0 TIMER OPERATION EXPLAME .................................................................................. 79
9
9
INSTRUCTION TABLE ....................................................................................................................... 81
10
10
ELECTRICAL CHARACTERISTIC .............................................................................................. 82
10.1 ABSOLUTE MAXIMUM RATING ................................................................................................ 82
10.2 ELECTRICAL CHARACTERISTIC ............................................................................................... 82
10.3 CHARACTERISTIC GRAPHS ....................................................................................................... 83
11
11
DEVELOPMENT TOOL .................................................................................................................. 84
11.1 SN8P2501A/B/C EV-
KIT
.................................................................................................................. 84
11.2 ICE
AND
EV-KIT APPLICATION NOTIC ...................................................................................... 85
12
12
OTP PROGRAMMING PIN ............................................................................................................. 86
12.1 WRITER TRANSITION BOARD SOCKET PIN ASSIGNMENT ................................................. 86
12.2 PROGRAMMING PIN MAPPING: ................................................................................................. 87
13
13
MARKING DEFINITION ................................................................................................................. 88
13.1 INTRODUCTION ............................................................................................................................ 88
13.2 MARKING INDETIFICATION SYSTEM ...................................................................................... 88
13.3 MARKING EXAMPLE ................................................................................................................... 89
13.4 DATECODE SYSTEM .................................................................................................................... 89
14
14
PACKAGE INFORMATION ........................................................................................................... 90
14.1 P-DIP 14 PIN .................................................................................................................................... 90
14.2 SOP 14 PIN ....................................................................................................................................... 91
14.3 SSOP 16 PIN..................................................................................................................................... 92
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Version 1.3