LY625128
Rev. 2.9
512K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 1.3
Rev. 1.4
Rev. 1.5
Rev. 2.0
Rev. 2.1
Description
Initial Issue
Revised I
SB1
/I
DR
Revised Test Condition of I
CC
Added -45ns Spec.
Added P-DIP PKG
Revised Test Condition of I
SB1
/I
DR
Adding PKG type : 44 TSOP-II
Adding SL Spec.
Revised
ABSOLUTE MAXIMUN RATINGS
Added I
SB1
/I
DR
values when T
A
= 25
℃
and T
A
= 40
℃
Revised
FEATURES
&
ORDERING INFORMATION
Lead
free and green package available
to
Green package available
Added packing type in
ORDERING INFORMATION
Deleted T
SOLDER
in
ABSOLUTE MAXIMUN RATINGS
Deleted -35ns Spec.
Revised V
DR
Revised
PACKAGE OUTLINE DIMENSION
in page
11/12/13/14
Revised
ORDERING INFORMATION
in page 16
Deleted PKG type : 44 TSOP-II
Revised V
IL(max)
from 0.6V to 0.8V
Revised
ORDERING INFORMATION
in page 18/19
Revised
TEST CONDITION
of I
CC
/I
CC1
/I
SB1
in
DC ELECTRICAL CHARACTERISTICS
(page 5)
and I
DR
in
DATA RETENTION CHARACTERISTICS
(page 9)
Deleted
WRITE CYCLE
Notes :
1. WE#,CE# must be high during all address transitions.
in page 8
Revised
ORDERING INFORMATION
in page 16
Issue Date
Jul.19.2005
Oct.31.2005
Sep.20.2006
Jan.12.2007
May.14.2007
Jun.4.2007
Jul.11.2007
Mar.30.2009
Rev. 2.2
Rev. 2.3
Rev. 2.4
Rev. 2.5
Rev. 2.6
Rev. 2.7
Rev. 2.8
Sep.11.2009
May.7.2010
Aug.30.2010
Feb.21.2012
May 8.2014
May 22.2015
Jun.2.2015
Rev. 2.9
Jun.29.2016
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0
LY625128
Rev. 2.9
512K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The LY625128 is a 4,194,304-bit low power CMOS
static random access memory organized as 524,288
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of operating
temperature.
The LY625128 is well designed for very low power
system applications, and particularly well suited for
battery back-up nonvolatile memory application.
The LY625128 operates from a single power
supply of 4.5V ~ 5.5V and all inputs and outputs are
fully TTL compatible
FEATURES
Fast access time : 45/55/70ns
Low power consumption:
Operating current : 45/40/30mA (TYP.)
Standby current : 5A@5V(TYP.) LL/SL version
3A@3V(TYP.) SL version
Single 4.5V ~ 5.5V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 1.5V (MIN.)
Green package available
Package : 32-pin 450 mil SOP
32-pin 600 mil PDIP
32-pin 8mm x 20mm TSOP I
32-pin 8mm x 13.4mm sTSOP
36-ball 6mm x 8mm TFBGA
PRODUCT FAMILY
Product
Operating
Family
Temperature
0 ~ 70℃
LY625128(LL)
-20 ~ 80℃
LY625128(LLE)
-40 ~ 85℃
LY625128(LLI)
0 ~ 70℃
LY625128(SL)
LY625128(SLE) -20 ~ 80℃
-40 ~ 85℃
LY625128(SLI)
Vcc Range
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
Speed
45/55/70ns
45/55/70ns
45/55/70ns
45/55/70ns
45/55/70ns
45/55/70ns
Power Dissipation
Standby(I
SB1,
TYP.)
Operating(Icc,TYP.)
-
5µA@5V
45/40/30mA
-
5µA@5V
45/40/30mA
-
5µA@5V
45/40/30mA
3µA@3V 5µA@5V
45/40/30mA
3µA@3V 5µA@5V
45/40/30mA
3µA@3V 5µA@5V
45/40/30mA
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
PIN DESCRIPTION
SYMBOL
A0 - A18
DQ0 – DQ7
CE#
WE#
OE#
V
CC
V
SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
A0-A18
DECODER
512Kx8
MEMORY ARRAY
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
WE#
OE#
CONTROL
CIRCUIT
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
1
LY625128
Rev. 2.9
512K X 8 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SOP/PDIP
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
A11
A9
A8
A13
WE#
A17
A15
Vcc
A18
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
Vss
DQ2
DQ1
DQ0
A0
A1
A2
A3
LY625128
XXXXXXXX
XXXXXXXX
LY625128
XXXXXXXX
XXXXXXXX
TSOP I /sTSOP
A
B
C
D
E
F
G
H
A0
DQ4
DQ5
Vss
Vcc
DQ6
A1
A2
NC
WE#
NC
A3
A4
A5
A6
A7
A8
DQ0
LY625128
XXXXXXXX
XXXXXXXX
DQ1
Vcc
Vss
A18
A17
DQ2
A15 DQ3
A13
A14
DQ7 OE# CE# A16
A9
A10
A11
A12
1
2
3
4
5
6
TFBGA(See through with Top View)
TFBGA(Top View)
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2
LY625128
Rev. 2.9
512K X 8 BIT LOW POWER CMOS SRAM
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Voltage on V
CC
relative to V
SS
Voltage on any other pin relative to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
SYMBOL
V
T1
V
T2
T
A
T
STG
P
D
I
OUT
RATING
-0.5 to 6.5
-0.5 to V
CC
+0.5
0 to 70(C grade)
-20 to 80(E grade)
-40 to 85(I grade)
-65 to 150
1
50
UNIT
V
V
℃
℃
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is
not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
L
L
L
OE#
X
H
L
X
WE#
X
H
H
L
I/O OPERATION
High-Z
High-Z
D
OUT
D
IN
SUPPLY CURRENT
I
SB1
I
CC
,I
CC1
I
CC
,I
CC1
I
CC
,I
CC1
H = V
IH
, L = V
IL
, X = Don't care.
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
3
LY625128
Rev. 2.9
512K X 8 BIT LOW POWER CMOS SRAM
DC ELECTRICAL CHARACTERISTICS
SYMBOL
TEST CONDITION
PARAMETER
Supply Voltage
V
CC
*1
Input High Voltage
V
IH
*2
Input Low Voltage
V
IL
Input Leakage Current
I
LI
V
CC
≧
V
IN
≧
V
SS
Output Leakage
V
CC
≧
V
OUT
≧
V
SS
,
I
LO
Current
Output Disabled
Output High Voltage
V
OH
I
OH
= -1mA
Output Low Voltage
V
OL
I
OL
= 2mA
I
CC
Average Operating
Power supply Current
I
CC1
Cycle time = Min.
CE# = V
IL
, I
I/O
= 0mA
Other pins at V
IL
or V
IH
- 45
- 55
- 70
MIN.
4.5
2.4
- 0.2
-1
-1
2.4
-
-
-
-
-
-
-
-
-
TYP.
5.0
-
-
-
-
-
-
45
40
30
4
5
3
3
5
*4
MAX.
5.5
V
CC
+0.3
0.8
1
1
-
0.4
70
60
50
10
50
10
10
25
UNIT
V
V
V
µA
µA
V
V
mA
mA
mA
mA
µA
µA
µA
µA
Standby Power
Supply Current
I
SB1
Cycle time = 1µ s
CE# = 0.2V, I
I/O
= 0mA
Other pins at 0.2V or V
CC
- 0.2V
LL/LLE/LLI
*5
CE#
≧V
CC
-0.2V
SL
25
℃
*5
Others at 0.2V or
SLE
*5
40℃
V
CC
- 0.2V
SLI
SL/SLE/SLI
Notes:
1. V
IH
(max) = V
CC
+ 3.0V for pulse width less than 10ns.
2. V
IL
(min) = V
SS
- 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical values are measured at V
CC
= V
CC
(TYP.) and T
A
= 25
℃
5. This parameter is measured at V
CC
= 3.0V
CAPACITANCE
(T
A
= 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -2mA/4mA
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
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