Rev. 2.10
32K X 8 BIT LOW POWER CMOS SRAM
LY62256
REVISION HISTORY
Revision
Rev. 1.0.
Rev. 2.0.
Rev. 2.1.
Rev. 2.2
Rev. 2.3
Rev. 2.4
Rev. 2.5
Rev. 2.6
Description
Initial Issue
Revised Vcc Range(Vcc=4.5~5.5V => 2.7~5.5V)
Revised I
SB1
Adding PKG type : skinny P-DIP
Revised V
IH
(min)=2.4V, V
IL
(max)=0.6V
Revised V
IH
(min)=2.4V, V
IL
(max)=0.6V (V
CC
=2.7~3.6V)
V
IH
(min)=2.4V, V
IL
(max)=0.8V (V
CC
=4.5~5.5V)
Revised
STSOP Package Outline Dimension
Added SL grade
Added I
SB1
/I
DR
values when T
A
= 25
℃
and T
A
= 40
℃
Revised
FEATURES
&
ORDERING INFORMATION
Lead
free and green package available
to
Green package available
Added packing type in
ORDERING INFORMATION
Revised I
SB1(MAX)
Revised V
TERM
to V
T1
and V
T2
Revised Test Condition of I
SB1
/I
DR
Deleted T
SOLDER
in
ABSOLUTE MAXIMUN RATINGS
Revised
PACKAGE OUTLINE DIMENSION
in page 8 & 9
Revised
PACKAGE OUTLINE DIMENSION
in page 10
Revised
ORDERING INFORMATION
in page 12
Revised
PACKAGE OUTLINE DIMENSION
in page 9
Revised
ORDERING INFORMATION
in page 14 & 15
Deleted
WRITE CYCLE
Notes :
1.WE#,CE# must be high during all address transitions.
in page 6.
Issue Date
Jul.25.2004
May.4.2005
May.13.2005
Aug.29.2005
Feb.24.2006
Jul.31.2006
Mar.26.2008
Mar.30.2009
Rev. 2.7
Rev. 2.8
Rev. 2.9
Rev. 2.10
Dec.18.2009
May.7.2010
May.7.2010
Aug.25.2010
Jun.28.2016
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
0
Rev. 2.10
32K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The LY62256 is a 262,144-bit low power CMOS static
random access memory organized as 32,768 words
by 8 bits. It is fabricated using very high performance,
high reliability CMOS technology. Its standby current
is stable within the range of operating temperature.
The LY62256 is well designed for low power
application, and particularly well suited for battery
back-up nonvolatile memory application.
The LY62256 operates from a single power supply
of 2.7~5.5V and all inputs and outputs are fully TTL
compatible
LY62256
FEATURES
Fast access time : 35/55/70ns
Low power consumption:
Operating current : 20/15/10mA (TYP.)
Standby current : 1A (TYP.)
Single 2.7~5.5V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 1.5V (MIN.)
Green package available
Package : 28-pin 600 mil P-DIP
28-pin 330 mil SOP
28-pin 8mm x 13.4mm STSOP
28-pin 300 mil Skinny P-DIP
PRODUCT FAMILY
Product
Family
LY62256
LY62256(E)
LY62256(I)
Operating
Temperature
0 ~ 70℃
-20 ~ 80℃
-40 ~ 85℃
Vcc Range
2.7 ~ 5.5V
2.7 ~ 5.5V
2.7 ~ 5.5V
Speed
35/55/70ns
35/55/70ns
35/55/70ns
Power Dissipation
Standby(I
SB1,
TYP.) Operating(Icc,TYP.)
1µA
20/15/10mA
1µA
20/15/10mA
1µA
20/15/10mA
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power Supply
Ground
Vcc
Vss
A0 - A14
DQ0 – DQ7
DECODER
32Kx8
MEMORY ARRAY
CE#
WE#
OE#
V
CC
V
SS
A0-A14
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
WE#
OE#
CONTROL
CIRCUIT
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
1
Rev. 2.10
32K X 8 BIT LOW POWER CMOS SRAM
LY62256
PIN CONFIGURATION
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Voltage on V
CC
relative to V
SS
Voltage on any other pin relative to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
SYMBOL
V
T1
V
T2
T
A
T
STG
P
D
I
OUT
RATING
-0.5 to 6.5
-0.5 to V
CC
+0.5
0 to 70(C grade)
-20 to 80(E grade)
-40 to 85(I grade)
-65 to 150
1
50
UNIT
V
V
℃
℃
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is
not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
L
L
L
OE#
X
H
L
X
WE#
X
H
H
L
I/O OPERATION
High-Z
High-Z
D
OUT
D
IN
SUPPLY CURRENT
I
SB
,I
SB1
I
CC
,I
CC1
I
CC
,I
CC1
I
CC
,I
CC1
H = V
IH
, L = V
IL
, X = Don't care.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2
Rev. 2.10
32K X 8 BIT LOW POWER CMOS SRAM
LY62256
DC ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage
Current
Output High Voltage
Output Low Voltage
SYMBOL
V
CC
V
IH
*1
V
IL
*2
I
LI
I
LO
V
OH
V
OL
I
CC
Average Operating
Power supply Current
I
CC1
I
SB
TEST CONDITION
MIN.
2.7
2.4
- 0.5
- 0.5
-1
-1
2.4
-
-
-
-
-
-
-
-
-
-
-
-
TYP.
*4
MAX.
3.3
5.5
-
V
CC
+0.5
-
0.6
-
0.8
-
1
-
3.0
-
20
15
10
3
1
1
1
1
1.5
1
1
1
-
0.4
50
45
40
10
3
20
30
3
4
10
20
UNIT
V
V
V
V
µA
µA
V
V
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
Standby Power
Supply Current
I
SB1
V
CC
=2.7~3.6V
V
CC
=4.5~5.5V
V
CC
≧
V
IN
≧
V
SS
V
CC
≧
V
OUT
≧
V
SS
,
Output Disabled
I
OH
= -1mA
I
OL
= 2mA
-35
Cycle time = Min.
CE# = V
IL
, I
I/O
= 0mA
-55
Other pins at V
IL
or V
IH
-70
Cycle time = 1µs
CE#
≦
0.2V and I
I/O
= 0mA
other pins at 0.2V or V
CC
-0.2V
CE# = V
IH,
other pins at V
IL
or V
IH
LL
LLE/LLI
SL
*5
25℃
CE#
≧
V
CC
-0.2V
SLE
*5
Others at 0.2V or
SLI
*5
40℃
V
CC
- 0.2V
SL
SLE/SLI
Notes:
1. V
IH
(max) = V
CC
+ 3.0V for pulse width less than 10ns.
2. V
IL
(min) = V
SS
- 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.) and T
A
= 25℃
5. This parameter is measured at V
CC
= 3.0V
CAPACITANCE
(T
A
= 25
℃
, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 50pF + 1TTL, I
OH
/I
OL
= -1mA/2mA
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
3
Rev. 2.10
32K X 8 BIT LOW POWER CMOS SRAM
LY62256
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
SYM.
t
RC
t
AA
t
ACE
t
OE
t
CLZ
*
t
OLZ
*
t
CHZ
*
t
OHZ
*
t
OH
LY62256-35
MIN.
MAX.
35
-
-
35
-
35
-
25
10
-
5
-
-
15
-
15
10
-
LY62256-55
MIN.
MAX.
55
-
-
55
-
55
-
30
10
-
5
-
-
20
-
20
10
-
LY62256-70
MIN.
MAX.
70
-
-
70
-
70
-
35
10
-
5
-
-
25
-
25
10
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYM.
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
*
t
WHZ
*
LY62256-35
MIN.
MAX.
35
-
30
-
30
-
0
-
25
-
0
-
20
-
0
-
5
-
-
15
LY62256-55
MIN.
MAX.
55
-
50
-
50
-
0
-
45
-
0
-
25
-
0
-
5
-
-
20
LY62256-70
MIN.
MAX.
70
-
60
-
60
-
0
-
55
-
0
-
30
-
0
-
5
-
-
25
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*These parameters are guaranteed by device characterization, but not production tested.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
4
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