LPSC3487
Lonten P-channel -30V, -4.3A, 46mΩ Power MOSFET
Description
These P-Channel enhancement mode power field
effect
transistors
are
using
trench
DMOS
technology. This advanced technology has been
especially tailored to minimize on-state resistance,
provide superior switching performance, and with
stand high energy pulse in the avalanche and
commutation mode. These devices are well suited
for high efficiency fast switching applications.
Product Summary
V
DSS
R
DS(on).max
@ V
GS
=-10V
I
D
-30V
46mΩ
-4.3A
Pin Configuration
Features
◆
◆
◆
◆
-30V,-4.3A,R
DS(ON).max
=46mΩ@V
GS
=-10V
Improved dv/dt capability
Fast switching
Green device available
SOT-23
Applications
◆
◆
◆
PWM applications
Load switch
Portable Equipment
T
A
= 25°C unless otherwise noted
P-Channel MOSFET
Pb
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Continuous drain current ( T
A
= 25° )
C
Symbol
V
DSS
Value
-30
-4.3
Unit
V
A
A
A
V
W
°
C
°
C
I
D
Continuous drain current ( T
A
= 100° )
C
Pulsed drain current
1)
Gate-Source voltage
Power Dissipation ( T
A
= 25° )
C
Storage Temperature Range
Operating Junction Temperature Range
I
DM
V
GSS
P
D
T
STG
T
J
-2.7
-17.2
±20
1.3
-55 to +150
-55 to +150
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Case
Symbol
R
θJA
Value
96
Unit
°
C/W
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LPSC3487
Package Marking and Ordering Information
Device
LPSC3487
Device Package
SOT-23
Marking
3487
Electrical Characteristics
Parameter
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
T
J
= 25°C unless otherwise noted
Symbol
Test Condition
Min.
Typ.
Max.
Unit
BV
DSS
V
GS(th)
V
GS
=0 V, I
D
=-250uA
V
DS
=V
GS
, I
D
=-250uA
V
DS
=-30 V, V
GS
=0 V, T
J
= 25°
C
-30
-1.2
---
---
---
---
---
---
---
---
-1.7
---
---
---
---
33
43
10
---
-2.2
-1
-10
100
-100
46
72
---
V
V
μA
μA
nA
nA
mΩ
mΩ
S
Drain-source leakage current
I
DSS
V
DS
=-24V, V
GS
=0 V, T
J
= 125°
C
Gate leakage current, Forward
Gate leakage current, Reverse
Drain-source on-state resistance
Forward transconductance
I
GSSF
I
GSSR
R
DS(on)
V
GS
=20 V, V
DS
=0 V
V
GS
=-20 V, V
DS
=0 V
V
GS
=-10 V, I
D
=-4.3 A
V
GS
=-4.5 V, I
D
=-3A
g
fs
V
DS
=-5 V , I
D
=-4.3A
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate resistance
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
R
g
V
GS
=0V,V
DS
=0V,f=1MHz
V
DD
=-10V,V
GS
=-4.5V, I
D
=-4.3A
Rg=3Ω
V
DS
= -15 V, V
GS
= 0 V,
F = 1MHz
---
---
---
---
---
---
88
4.0
31.1
38.9
8.9
11
---
---
---
ns
---
---
---
Ω
---
---
940
103
---
---
pF
Gate charge characteristics
Gate to source charge
Gate to drain charge
Gate charge total
Q
gs
Q
gd
Q
g
V
DS
=-15 V, I
D
=-4.3A,
V
GS
=-10 V
---
14.8
---
---
---
2.4
2.9
---
---
nC
Drain-Source diode characteristics and Maximum Ratings
Continuous Source Current
Pulsed Source Current
2)
Diode Forward Voltage
I
S
I
SM
V
SD
V
GS
=0V, I
S
=-1A, T
J
=25℃
---
---
---
---
---
---
-4.3
-17.2
-1.2
A
A
V
Notes:
1: Repetitive Rating: Pulse width limited by maximum junction temperature.
2: Pulse Test:Pulse Width
≤300μs,
Duty Cycle≤2%.
Version 1.2, May-2019
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LPSC3487
Electrical Characteristics Diagrams
Figure 1. Typ. Output Characteristics
Figure 2. Transfer Characteristics
Common Source
V
DS
= -5 V
Pulse test
V
GS
=-3V,-3.5V, -4.5V,-6V,-8V,-10V
-I
D
-Drain current (A)
From Bottom to Top
Common Source
T
A
= 25°C
Pulse test
V
GS
=-2.5V
-I
D
-Drain current (A)
125°C
25°C
V
GS
=-2V
V
GS
=-1.5V
-V
DS
-Drain−source voltage (V)
-V
GS
-Gate−source voltage (V)
Figure 3. Capacitance
Characteristics
Figure 4. Gate Charge Waveform
V
gs
= -10V
-V
GS
-Gate-Source Voltage (V)
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
V
ds
= -15 V
I
D
= -4.3 A
Capacitance (pF)
Ciss
Notes:
f = 1 MHz
V
GS
=0 V
Coss
Crss
-V
DS
-Drain-Source Voltage (V)
Total Gate Charge Q
G
(nC)
Figure 5. Body-Diode Characteristics
Figure 6. Rdson-Drain Current
-I
S
-Reverse Drain current (A)
ON-Resistance Rdson (ohm)
V
GS
= -4.5V
125°C
25°C
V
GS
= -10V
-V
SD
-Source-Drain Voltage (V)
-I
D
-Drain Current (A)
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LPSC3487
Figure 7. Rdson-Junction Temperature(℃)
Figure 8. Rds(on) vs Gate Voltage
I
D
= -4.3A
V
GS
= -10V
I
D
= -4A
T -Junction Temperation (
°C
)
J
ON-Resistance Rdson (mohm)
Normalized On-Resistance
-V
GS
-Gate−source voltage (V)
Figure 9.
BVdss vs. Junction temperature(℃)
Figure 10. Maximum Safe Operating Area
Normalized Drain to Source Voltage
I
D
= -250uA
T -Junction Temperation (
°C
)
J
-I
D
-Drain current (A)
-V
DS
-Drain-Source Voltage (V)
Figure 11. Normalized Maximum Transient Thermal Impedance (RthJA)
D=Ton/T
In descending oder
DM
Normalized Transient
T
Thermal Resistance
J,PK
θJA
=T +P
A
.Z
θJA
.R
θJA
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
R
=96℃/W
Z
θJA
Single Pulse
Pulse Width t (s)
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LPSC3487
Test Circuit & Waveform
Figure 8. Gate Charge Test Circuit & Waveform
Figure 9. Resistive Switching Test Circuit & Waveforms
Figure 10. Unclamped Inductive Switching (UIS) Test Circuit & Waveform
Figure 11. Diode Recovery Circuit & Waveform
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