LNC08R055W3/LND08R055W3/LNE08R055W3
Lonten N-channel 85V, 120A, 5.5mΩ Power MOSFET
Description
These N-Channel enhancement mode power field
effect transistors are using split gate trench DMOS
technology. This advanced technology has been
especially tailored to minimize on-state resistance,
provide superior switching performance, and with
stand high energy pulse in the avalanche and
commutation mode. These devices are well suited
for high efficiency fast switching applications.
Product Summary
V
DSS
R
DS(on).max
@ V
GS
=10V
I
D
85V
5.5mΩ
120A
Pin Configuration
Features
85V,120A,R
DS(ON).max
=5.5mΩ@VGS = 10V
Improved dv/dt capability
Fast switching
100% EAS Guaranteed
Green device available
G
S
TO-220FB
TO-220MF
D
Applications
TO-263-2L
N-Channel MOSFET
Motor Drives
UPS
DC-DC Converter
Pb
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Continuous drain current ( T
C
= 25° )
1)
C
Continuous drain current ( T
C
= 100° )
1)
C
Pulsed drain current
2)
Gate-Source voltage
Avalanche energy
3)
T
C
= 25° unless otherwise noted
C
Symbol
V
DSS
I
D
Value
85
120
87
Unit
V
A
A
A
V
mJ
W
W
°
C
°
C
I
DM
V
GSS
E
AS
P
D
480
±20
144
189
56
Power Dissipation ( T
C
= 25° ) TO-220FB/TO-263-2L
C
Power Dissipation ( T
C
= 25° ) TO-220MF
C
Storage Temperature Range
Operating Junction Temperature Range
T
STG
T
J
-55 to +150
-55 to +150
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Case TO-220FB/TO-263-2L
Thermal Resistance, Junction-to-Case TO-220MF
Thermal Resistance, Junction-to-Ambient TO-220FB/TO-263-2L
Thermal Resistance, Junction-to-Case TO-220MF
R
θJA
Symbol
R
θJC
Value
0.55
2.2
62
80
Unit
°
C/W
°
C/W
°
C/W
°
C/W
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LNC08R055W3/LND08R055W3/LNE08R055W3
Package Marking and Ordering Information
Device
LNC08R055W3
LND08R055W3
LNE08R055W3
Device Package
TO-220FB
TO-220MF
TO-263-2L
T
J
= 25° unless otherwise noted
C
Marking
LNC08R055W3
LND08R055W3
LNE08R055W3
Electrical Characteristics
Parameter
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
Drain-source leakage current
Symbol
Test Condition
Min.
Typ.
Max.
Unit
BV
DSS
V
GS(th)
I
DSS
V
GS
=0 V, I
D
=250uA
V
DS
=V
GS
, I
D
=250uA
V
DS
=85 V, V
GS
=0 V, T
J
= 25°
C
V
DS
=85 V, V
GS
=0 V, T
J
= 125°
C
85
2.0
---
---
---
---
---
---
---
3.0
---
---
---
---
4.6
84.2
---
4.0
1
5
100
-100
5.5
---
V
V
μA
μA
nA
nA
mΩ
S
Gate leakage current, Forward
Gate leakage current, Reverse
Drain-source on-state resistance
Forward transconductance
I
GSSF
I
GSSR
R
DS(on)
g
fs
V
GS
=20 V, V
DS
=0 V
V
GS
=-20 V, V
DS
=0 V
V
GS
=10 V, I
D
=50 A
V
DS
=5 V , I
D
=50A
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate resistance
C
iss
V
DS
= 40 V, V
GS
= 0 V,
C
oss
F = 1MHz
C
rss
t
d(on)
t
r
t
d(off)
t
f
R
g
V
GS
=0V, V
DS
=0V, F=1MHz
V
DD
= 40V,V
GS
=10V, I
D
= 13A
---
---
---
---
---
---
9
20.1
38.9
45.1
22.8
4.0
---
---
---
ns
---
---
---
Ω
---
888
---
pF
---
3948
---
Gate charge characteristics
Gate to source charge
Gate to drain charge
Gate charge total
Q
gs
V
DS
=40 V, I
D
=50A,
Q
gd
V
GS
= 10 V
Q
g
---
46
---
---
10
---
nC
---
16
---
Drain-Source diode characteristics and Maximum Ratings
Continuous Source Current
Pulsed Source Current
4)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
I
S
I
SM
V
SD
t
rr
I
S
=20A, di/dt=60A/us, T
J
=25℃
Q
rr
---
123
---
nC
V
GS
=0V, I
S
=50A, T
J
=25℃
---
---
---
---
---
---
0.95
107
120
480
1.4
---
A
A
V
ns
Notes:
1: The maximum junction current rating is package limited.
2: Repetitive Rating: Pulse width limited by maximum junction temperature.
3: V
DD
=50V, V
GS
=10V, L=0.5mH, I
AS
=24A, R
G
=25Ω, Starting T
J
=25℃.
4: Pulse Test：Pulse Width
≤300μs,
Duty Cycle≤2％.
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LNC08R055W3/LND08R055W3/LNE08R055W3
Electrical Characteristics Diagrams
Figure 1. Typ. Output Characteristics
Figure 2. Transfer Characteristics
Figure 3. Capacitance
Characteristics
Figure 4. Gate Charge Waveform
Figure 5. Body-Diode Characteristics
Figure 6. Rdson-Drain Current
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LNC08R055W3/LND08R055W3/LNE08R055W3
Figure 7. Rdson-Junction Temperature(℃)
Figure 8. Maximum Safe Operating Area
Figure 6. Normalized Maximum Transient Thermal Impedance (RthJC)
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LNC08R055W3/LND08R055W3/LNE08R055W3
Test Circuit & Waveform
Figure 8. Gate Charge Test Circuit & Waveform
Figure 9. Resistive Switching Test Circuit & Waveforms
Figure 10. Unclamped Inductive Switching (UIS) Test Circuit & Waveform
Figure 11. Diode Recovery Circuit & Waveform
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