M54HC4060
M74HC4060
14 STAGE BINARY COUNTER/OSCILLATOR
.
.
.
.
.
.
.
.
HIGH SPEED
f
MAX
= 58 MHz (TYP.) AT V
CC
= 5 V
LOW POWER DISSIPATION
I
CC
= 4
µA
(MAX.) AT T
A
= 25
°C
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
PIN AND FUNCTION COMPATIBLE
WITH 4060B
B1R
(Plastic Package)
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC4060F1R
M74HC4060M1R
M74HC4060B1R
M74HC4060C1R
PIN CONNECTIONS
(top view)
DESCRIPTION
The M54/74HC4060 is a high speed CMOS 14-
STAGE BINARY COUNTER/OSCILLATOR fabri-
cated in silicon gate C
2
MOS technology. It has the
same high speed performance of LSTTL combined
with true CMOS low power consumption. It operates
ten times faster than metal-gate C
2
MOS IC (4060B)
with the same power dissipation.
The oscillator configuration allows design of either
RC or crystal oscillator circuits. A high level on the
CLEAR accomplishes the reset function, i.e. all
counter outputs are made low and the oscillator is
disabled.
A negative transition on the clock input increments
the counter. Ten kinds of divided output are pro-
vided ; 4 to 10 and 12 to 14 stage inclusive. The
maximum division available at Q12 is 1/16384 f os-
cillator.
The Ø
1
input and the CLEAR input are equipped
with protection circuits against static discharge and
transient excess voltage.
March 1993
NC =
No Internal
Connection
1/12
M54/M74HC4060
INPUT AND OUTPUT EQUIVALENT CIRCUIT
TRUTH TABLE
øI
X
CLEAR
H
L
L
X: DON’T CARE
FUNCTION
COUNTER IS RESET TO ZERO STATE
ø0 OUTPUT GOES TO HIGH LEVEL
ø0 OUTPUT GOES TO LOW LEVEL
COUNT UP ONE STEP
NO CHANGE
LOGIC DIAGRAM
2/12
M54/ M74HC4060
PIN DESCRIPTION
PIN No
1, 2, 3
7, 5, 4, 6,
14, 13, 15
9
10
11
12
8
16
SYMBOL
Q12 to Q14
Q4 to Q10
øO
øO
øI
CLEAR
GND
V
CC
NAME AND FUNCTION
Counter Outputs
Counter Outputs
External Capacitor
Connection
External Resistor
Connection
Clock Input/Oscillator Pin
Master Reset
Ground (0V)
Positive Supply Voltage
IEC LOGIC SYMBOL
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
CC
I
O
or I
GND
P
D
T
stg
T
L
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source Sink Current Per Output Pin
DC V
CC
or Ground Current
Power Dissipation
Storage Temperature
Lead Temperature (10 sec)
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
25
±
50
500 (*)
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
mW
o
o
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW:
≅
65
o
C derate to 300 mW by 10mW/
o
C: 65
o
C to 85
o
C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
t
r
, t
f
Parameter
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature:
M54HC
Series
M74HC
Series
Input Rise and Fall Time
V
CC
= 2 V
V
CC
= 4.5 V
V
CC
= 6 V
Value
2 to 6
0 to V
CC
0 to V
CC
-55 to +125
-40 to +85
0 to 1000
0 to 500
0 to 400
Unit
V
V
V
o
C
o
C
ns
3/12
M54/ M74HC4060
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Test Conditions
Symbol
Parameter
V
CC
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
C
IN
C
PD
(*)
Input Capacitance
Power Dissipation
Capacitance
6
30
35
T
A
= 25
o
C
54HC and 74HC
Min. Typ. Max.
30
8
7
170
41
30
32
7
5
85
23
17
12
50
65
30
8
7
30
8
7
40
10
9
5
27
75
15
13
75
15
13
100
20
17
10
75
15
13
300
60
51
75
15
13
195
39
33
5
24
28
95
19
16
95
19
16
125
25
21
10
Value
-40 to 85
o
C -55 to 125
o
C
74HC
54HC
Min. Max. Min. Max.
95
19
16
375
75
64
95
19
16
245
49
42
4
20
24
110
22
19
110
22
19
150
30
26
10
pF
pF
ns
ns
ns
110
22
19
450
90
76
110
22
19
295
59
50
ns
ns
ns
ns
Unit
t
TLH
t
THL
t
PLH
t
PHL
t
PD
Output Transition
Time
Propagation
Delay Time
(øI - Q4)
Propagation Delay
Time Difference
(Qn- Qn+1)
Propagation
Delay Time
(CLEAR - Qn)
Maximum Clock
Frequency
Minimum Pulse
Width (øI)
Minimum Pulse
Width (CLEAR)
Minimum
Removal Time
t
PLH
t
PHL
f
MAX
t
W(H)
t
W(L)
t
W(H)
t
REM
ns
(*) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. I
CC
(opr) = C
PD
•V
CC
•f
IN
+ I
CC
5/12
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