TN805, TN815, TS820, TYN608
Sensitive and standard 8 A SCRs
Datasheet
-
production data
A
K
Description
Available either in sensitive (TS8) or standard
(TN8 / TYN) gate triggering levels, the 8 A SCR
series is suitable to fit all modes of control found
in applications such as overvoltage crowbar
protection, motor control circuits in power tools
and kitchen aids, inrush current limiting circuits,
capacitive discharge ignition and voltage
regulation circuits.
G
A
TO-220AB
K
A
A
G
TO-220FPAB
K
A
G
A
Available in through-hole or surface-mount
packages, they provide an optimized performance
in a limited space.
Table 1. Device summary
K
A
G
IPAK
K
Order code
A
G
TO-220AB
Voltage (x00)
V
DRM
/V
RRM
Sensitivity
Package
I
GT
600 V 800 V
X
X
X
0.2 mA
0.2 mA
0.2 mA
DPAK
IPAK
TO-
220AB
TO-
220FPA
B
DPAK
DPAK
TO-
220AB
A
TS820-600B
TS820-600H
K
A
G
DPAK
TS820-600T
TS820-600FP
X
X
X
X
X
0.2 mA
5 mA
15 mA
15 mA
Features
•
On-state rms current, I
T(RMS)
8 A
•
Repetitive peak off-state voltage, V
DRM
/V
RRM
600 and 800 V
•
Triggering gate current, I
GT
0.2 to 15 mA
TN805-600B
TN815-x00B
TYN608RG
May 2014
This is information on a product in full production.
DocID7476 Rev 8
1/17
www.st.com
Characteristics
TN805, TN815, TS820, TYN608
1
Characteristics
Table 2. Absolute ratings (limiting values)
Value
Symbol
Parameter
TN805
TN815 TYN608
TS820
Unit
I
T(RMS)
On-state rms current (180° conduction angle)
T
c
= 110 °C
T0-220FPAB, T
c
= 91 °C
8
A
I
T(AV)
Average on-state current (180° conduction angle)
Non repetitive surge peak
on-state current
I
2
t value for fusing
Critical rate of rise of on-state
current I
G
= 2 x I
GT
, t
r
≤
100 ns
Peak gate current
Average gate power dissipation
Storage junction temperature range
Operating junction temperature range
t
p
= 8.3 ms
t
p
= 10 ms
t
p
= 10 ms
F = 60 Hz
t
p
= 20 µs
T
c
= 110 °C
T0-220FPAB, T
c
= 91 °C
73
T
j
= 25 °C
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
T
j
= 125 °C
70
24.5
5
100
A
I
TSM
I
2
t
dI/dt
I
GM
P
G(AV)
T
stg
T
j
V
RGM
A
95
45
50
4
1
- 40 to + 150
- 40 to + 125
5
A
2
S
A/µs
A
W
°C
V
Maximum peak reverse gate voltage (for
TN8x5
and
TYN608
only)
Table 3. Sensitive electrical characteristics (T
j
= 25 °C, unless otherwise specified)
Symbol
I
GT
V
GT
V
GD
V
RG
I
H
I
L
dV/dt
V
TM
V
t0
R
d
I
DRM
I
RRM
V
D
= 12 V, R
L
= 140
Ω
V
D
= V
DRM,
R
L
= 3.3 kΩ, R
GK
= 220
Ω
I
RG
= 10 µA
I
T
= 50 mA, R
GK
= 1 kΩ
I
G
= 1 mA ,, R
GK
= 1 kΩ
V
D
= 65% V
DRM
, R
GK
= 220
Ω
I
TM
= 16 A, t
p
= 380 µs
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
, R
GK
= 220
Ω
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
Test conditions
MAX.
MAX.
MIN.
MIN.
MAX.
MAX.
MIN.
MAX.
MAX.
MAX.
MAX.
1
mA
TS820
200
0.8
0.1
8
5
6
5
1.6
0.85
46
5
Unit
µA
V
V
V
mA
mA
V/µs
V
V
mΩ
µA
2/17
DocID7476 Rev 8
TN805, TN815, TS820, TYN608
Characteristics
Table 4. Standard electrical characteristics (T
j
= 25 °C, unless otherwise specified)
Symbol
I
GT
V
GT
V
GD
I
H
I
L
dV/dt
V
TM
V
t0
R
d
I
DRM
I
RRM
V
D
= V
DRM,
R
L
= 3.3 kΩ
I
T
= 100 mA , gate open
I
G
= 1.2 I
GT
V
D
= 67% V
DRM,
gate open
I
TM
= 16 A
t
p
= 380 µs
T
j
=125 °C
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
Test conditions
MIN.
V
D
= 12 V, R
L
= 33
Ω
MAX.
MAX.
MIN.
MAX.
MAX.
MIN.
MAX.
MAX.
MAX.
MAX.
2
mA
25
30
50
TN805
0.5
5
TN815
2
15
1.3
0.2
40
50
150
1.6
0.85
46
5
30
70
150
TYN608
2
mA
15
V
V
mA
mA
V/µs
V
V
mΩ
µA
Unit
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
Table 5. Thermal resistance
Symbol
R
th(j-c)
Junction to case (DC)
TO-220FPAB
S
(1)
= 0.5 cm
2
R
th(j-a)
Junction to ambient (DC)
DPAK
IPAK
TO-220AB, TO-220FPAB
1. S = Copper surface under tab
Parameter
DPAK, IPAK, TO-220AB
Value
1.3
Unit
°C/W
4.6
70
100
60
°C/W
Figure 1. Maximum average power dissipation
versus average on-state current
P(W)
8
7
6
7
α
= 180°
Figure 2. Average and DC on-state current
versus case temperature
I
T(AV)
(A)
10
DPAK IPAK
9
8
D.C.
TO-220AB
5
4
3
360°
6
5
4
3
2
α
= 180°
TO-220FPAB
2
1
0
0
1
2
3
4
5
6
I
T(AV)
(A)
α
1
0
0
25
T
case
(°C)
50
75
100
125
DocID7476 Rev 8
3/17
17
Characteristics
TN805, TN815, TS820, TYN608
Figure 3. Average and DC on-state current
versus ambient temperature
I
T(AV)
(A)
2,5
D.C.
α
= 180°
Figure 4. Relative variation of thermal
impedance junction to case versus pulse
duration
K=[Z
th(j-c)
/R
th(j-c)
]
1.0
Recommended pad layout,
FR4 printed circuit board
2,0
TO-220AB
TO-220FPAB
0.5
1,5
1,0
DPAK
IPAK
0.2
0,5
T
amb
(°C)
0,0
0
25
50
75
100
125
t
p
(s)
0.1
1E-3
1E-2
1E-1
1E+0
Figure 5. Relative variation of thermal
impedance junction to ambient versus pulse
duration
K=[Z
th(j-a)
/R
th(j-a)
]
1.00
Figure 6. Relative variation of gate trigger
current and holding current versus junction
temperature for TS820
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
2.0
1.8
I
GT
Recommended pad layout,
FR4 printed circuit board
1.6
DPAK
1.4
1.2
I
H
& I
L
R
GK
= 1k
Ω
0.10
TO-220AB / IPAK
TO-220FPAB
1.0
0.8
0.6
0.4
t
p
(s)
0.01
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
0.2
0.0
-40
-20
0
20
T
j
(°C)
40
60
80
100
120
140
Figure 7. Relative variation of gate trigger and Figure 8. Relative variation of holding current
holding current versus junction temperature versus gate-cathode resistance (typical values)
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-40
-20
0
20
40
60
80
100
120
140
I
H
& I
L
I
GT
I
H
[R
GK
] / I
H
[R
GK
=1k
Ω
]
6.0
5.5
TN8 and TYNx8
TS8
T
j
= 25°C
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
T
j
(°C)
1.0
0.5
0.0
1E-2
1E-1
R
GK
(k
Ω
)
1E+0
1E+1
4/17
DocID7476 Rev 8
TN805, TN815, TS820, TYN608
Characteristics
Figure 9. Relative variation of dV/dt immunity Figure 10. Relative variation of dV/dt immunity
versus gate-cathode resistance (typical values)
versus gate-cathode capacitance (typical
for TS820
values) for TS820
dV/dt[R
GK
] / dV/dt[R
GK
=220
Ω
]
10.00
T
j
= 125°C
V
D
= 0.67 x V
DRM
dV/dt[C
GK
] / dV/dt[R
GK
=220
Ω
]
15.0
V
D
= 0.67 x V
DRM
T
j
= 125°C
R
GK
= 220
Ω
12.5
1.00
10.0
7.5
0.10
5.0
2.5
R
GK
(k
Ω
)
0.01
0
200
400
600
800
1000
1200
1400
1600
1800
2000
C
GK
(nF)
0.0
0
20
40
60
80
100
120
140
160
180
200
220
Figure 11. Surge peak on-state current versus
number of cycles
I
TSM
(A)
100
90
80
70
60
50
40
30
20
10
0
1
10
Repetitive
T
C
=110°C
TN8 / TS8
Non repetitive
T
j
initial=25°C
TYN08
t
p
=10ms
One cycle
Figure 12. Non-repetitive surge peak on-state
current and corresponding values of I
2
t
I
TSM
(A), I t (A s)
1000
T
j
initial = 25°C
2
2
I
TSM
TYN08
dI/dt limitation
100
Sinusoidal pulse width tp < 10 ms
TN8 / TS8
TYN08
I
2
t
TN8 / TS8
Number of cycles
10
100
1000
t
p
(ms)
0.01
0.10
1.00
10.00
Figure 13. On-state characteristics (maximum
values)
I
TM
(A)
50.0
T
j
max.:
V
t0
=0.85V
R
d
=46m
Ω
Figure 14. Thermal resistance junction to
ambient versus copper surface under tab
(DPAK)
R
th(j-a)
(°C/W)
100
80
Epoxy printed circuit board FR4
copper thickness = 35 µm
10.0
T
j
=max
60
1.0
T
j
=25°C
40
20
V
TM
(V)
0.1
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
S(cm²)
0
0
2
4
6
8
10
12
14
16
18
20
DocID7476 Rev 8
5/17
17
stm32/stm8
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