BTA08, BTB08, T810
T835, T850
Datasheet
Snubberless™, logic level and standard 8 A Triacs
A2
Features
•
On-state rms current, I
T(RMS)
8 A
Repetitive peak off-state voltage, V
DRM
/ V
RRM
600 V to 800 V
Triggering gate current, I
GT
5 to 50 mA
•
G
A2
A1
•
Description
G
A2
A1
TO-220AB
A2
A2
A1
TO-220AB Ins.
G
Available either in through-hole and surface-mount packages, these devices are
suitable for general purpose AC switching. They can be used as an ON/OFF function
in applications such as static relays, heating regulation, induction motor starting
circuits or for phase control operation in light dimmers and motor speed controllers,
etc.
The Snubberless versions (BTA, BTB08_xxxxW and T8 series) are specially
recommended for use on inductive loads, thanks to their high commutation
performance.
Logic level versions are designed to interface directly with low power drivers such as
Microcontrollers.
By using an internal ceramic pad, the BTA series provide voltage insulated tab (rated
at 2500 V
RMS
) in compliance with UL standards (file ref.: E81734).
D²PAK
A2
A2 G
A1
A2
A2 G
A2
A1
G
DPAK
A1
IPAK
Product status link
BTA08
BTB08
T810
T835
T850
DS2114
-
Rev 14
-
May 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
BTA08, BTB08, T810, T835, T850
Characteristics
1
Characteristics
Table 1.
Absolute maximum ratings (T
j
= 25 °C unless otherwise stated)
Symbol
I
T(RMS)
RMS on-state current (full sine wave)
Non repetitive surge peak on-state current (full
cycle, T
j
initial = 25 °C)
I
2
t value for fusing
Critical rate of rise of on-state current I
G
= 2 x
I
GT
, tr ≤ 100 ns
Peak gate current
Average gate power dissipation
Storage junction temperature range
Operating junction temperature range
f = 120 Hz
t
p
= 20 µs
Parameter
IPAK, DPAK,TO-220AB, D²PAK T
c
= 110 °C
TO-220AB Ins.
f = 50 Hz
f = 60 Hz
T
c
= 100 °C
t = 20 ms
t
p
= 16.7 ms
t
p
= 10 ms
T
j
= 125 °C
T
j
= 125 °C
T
j
= 125 °C
Value
8
80
84
36
50
4
1
-40 to +150
-40 to +125
Unit
A
I
TSM
I
2
t
dl/dt
I
GM
P
G(AV)
T
stg
T
j
A
A
2
s
A/µs
A
W
°C
°C
Table 2.
Electrical characteristics (T
j
= 25 °C, unless otherwise specified) Snubberless and logic level (3
quadrants)
Symbol
I
GT
(1)
V
GT
V
GD
I
H
(2)
I
L
dV/dt
(2)
Parameter
Quadrant
I - II - III
I - II - III
I - II - III
I - II - III
I - III
II
Max.
Max.
Min.
Max.
Max.
Max.
Max.
Min.
Min.
Min.
15
25
30
40
5.4
2.8
4.5
7
35
50
60
400
75
70
110
1000
T8
10
10
35
35
50
50
TW
5
1.2
0.2
10
10
15
20
3.5
1.5
15
25
30
40
5.4
2.98
4.5
7
A/ms
35
50
60
400
50
70
80
1000
BTA08/BTB08
SW
10
CW
35
BW
50
Unit
mA
V
V
mA
mA
V/µs
V
D
= 12 V, R
L
= 30 Ω
V
D
= V
DRM
, R
L
= 3.3 kΩ, T
j
= 125 °C
I
T
= 100 mA
I
G
= 1.2 x I
GT
V
D
= 67% V
DRM
, gate open, T
j
= 125 °C
(dV/dt)c = 0.1 V/µs, T
j
= 125 °C
(dl/dt)c
(2)
(dV/dt)c = 10 V/µs, T
j
= 125 °C
Without snubber, T
j
= 125 °C
1. Minimum I
GT
is guaranteed at 5 % of I
GT
max.
2. For both polarities of A2 referenced to A1
DS2114
-
Rev 14
page 2/21
BTA08, BTB08, T810, T835, T850
Characteristics
Table 3.
Standard (4 quadrants)
Symbol
Parameter
Quadrant
I - II - III
V
D
= 12 V, R
L
= 33 Ω
IV
All
V
D
= V
DRM
, R
L
= 33 Ω, T
j
= 125 °C
I
T
= 500 mA
I
G
= 1.2 I
GT
V
D
= 67 % V
DRM
gate open, T
j
= 125 °C
(dI/dt)c = 3.5 A/ms, T
j
= 125 °C
All
I - II - III
I - III - IV
II
BTA08/BTB08
C
Max.
Max.
Min.
Max.
Max.
Min.
Min.
25
40
80
200
5
25
50
1.3
0.2
50
50
100
400
10
B
50
100
Unit
I
GT
(1)
V
GT
V
GD
I
H
(2)
I
L
dV/dt
(2)
(dV/dt)c
(2)
mA
V
V
mA
mA
V/µs
A/ms
1. Minimum I
GT
is guaranteed at 5 % of I
GT
max.
2. For both polarities of A2 referenced to A1
Table 4.
Static electrical characteristics
Symbol
V
TM
(1)
V
TO
(1)
R
D
(1)
I
DRM
I
RRM
I
TM
= 11 A, t
p
= 380 µs
threshold on-state voltage
Dynamic resistance
V
DRM
= V
RRM
Test conditions
T
j
= 25 °C
T
j
= 125 °C
T
j
= 125 °C
T
j
= 25 °C
T
j
= 125 °C
Max.
Max.
Max.
Max.
Max.
Value
1.55
0.85
50
5
1
Unit
V
V
mΩ
µA
mA
1. For both polarities of A2 referenced to A1
Table 5.
Thermal resistance
Symbol
R
th(j-c)
Parameter
Max. junction to case thermal resistance (AC)
S = 2 cm²
(1)
S = 1 cm²
(1)
IPAK / D2PAK / DPAK / TO-220AB
TO-220AB Insulated
D²PAK
DPAK
TO-220AB / TO-220AB Insulated
IPAK
Value
1.6
2.5
45
70
60
100
°C/W
Unit
°C/W
Junction to ambient (typ.)
R
th(j-a)
Junction to ambient (typ.)
1. S = Copper surface under tab.
DS2114
-
Rev 14
page 3/21
BTA08, BTB08, T810, T835, T850
Characteristics (curves)
1.1
Characteristics (curves)
Figure 2.
RMS on-state current versus temperature (full
cycle)
I
T(RMS)
(A)
BTB/T8
BTA
Figure 1.
Maximum power dissipation versus on-state
RMS current (full cycle)
P(W)
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
I
T
(RMS)
(A)
0
1
2
3
4
5
6
7
8
1
0
0
25
T
c(°C)
50
75
100
125
Figure 3.
RMS on-state current versus ambient
temperature (full cycle)
I
T(RMS)
(A)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
25
50
75
100
125
DPAK
(S = 0.5 cm²)
D²PAK
(S = 1 cm²)
Printed circuit board FR4, copper thickness: 35 µm
Figure 4.
Relative variation of thermal impedance versus
pulse duration
K = [Z
th
/R
th
]
1E+0
Zth(j-c)
DPAK/IPAK
Zth(j-a)
1E-1
TO-220AB/D²PAK
Zth(j-a)
1E-2
T
c(°C)
1E-3
1E-3
t
p(s)
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
DS2114
-
Rev 14
page 4/21
BTA08, BTB08, T810, T835, T850
Characteristics (curves)
Figure 5.
On-state characteristics (maximum values)
I
TM
(A)
100
Tj max.
Vto = 0.85 V
Rd = 50 mΩ
Tj = Tj max.
Figure 6.
Surge peak on-state current versus number of
cycles
I
TSM
(A)
90
80
70
60
t = 16.66 ms
Non repetitive
T
j
initial = 25 °C
One cycle
10
50
Tj = 25 °C
40
30
20
Repetitive
T
C
= 110 °C
1
0.5
1.0
1.5
2.0
2.5
V
TM
(V)
3.0
3.5
4.0
4.5
5.0
10
0
1
10
100
Number of cycles
1000
Figure 7.
Non repetitive surge peak on-state current for a
sinusoidal pulse (t
p
< 10 ms)
I
TSM
(A)
1000
T
j
initial=25°C
Figure 8.
Relative variation of gate trigger current
I
GT
,I
H
,I
L
[Tj] / I
GT
,I
H
,I
L
[Tj = 25 °C]
2.5
Holding current and latching current versus junction temperature (typical values)
2.0
I
GT
dI/dt limitation:
50A/µs
I
TSM
1.5
1.0
100
360°
I
H
and I
L
α
0.5
10
0.01
t
p
(ms)
0.10
1.00
10.00
0.0
-40
T
j
(°C)
-20
0
20
40
60
80
100
120
140
Figure 9.
Relative variation of critical rate of decrease of
main current versus (dV/dt)c (typical values)
(dl/dt)c [(dV/dt)c / specified (dl/dt)c
Figure 10.
Relative variation of critical rate of decrease of
main current versus (dV/dt)c (typical values)
(dl/dt)c [(dV/dt)c] / specified (dl/dt)c
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.1
1.0
(dV/dt)c (V/µs)
T810/SW
T835/T850/CW/SW/BW
TW
Snubberless and logic level types
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
(dV/dt)c (V/µs)
B
C
Standard types
10.0
100.0
0.4
0.1
1.0
10.0
100.0
DS2114
-
Rev 14
page 5/21
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