74LCX244 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
February 1994
Revised March 2005
74LCX244
Low Voltage Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
General Description
The LCX244 contains eight non-inverting buffers with
3-STATE outputs. The device may be employed as a mem-
ory address driver, clock driver and bus-oriented transmit-
ter/receiver. The LCX244 is designed for low voltage (2.5V
or 3.3V) V
CC
applications with capability of interfacing to a
5V signal environment.
The LCX244 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V to 3.6V V
CC
specifications provided
s
6.5 ns t
PD
max (V
CC
3.3V), 10
P
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
r
24 mA output drive (V
CC
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Leadless DQFN Pb-Free package
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX244WM
(Note 2)
74LCX244WMX_NL
(Note 4)
74LCX244SJ
(Note 2)
74LCX244BQX
(Note 3)
74LCX244MSA
(Note 2)
74LCX244MTC
(Note 2)
74LCX244MTC_NL
(Note 4)
74LCX244MTCX_NL
(Note 4)
Package
Number
M20B
M20B
M20D
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MLP020B Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 4.5mm
MSA20
MTC20
MTC20
MTC20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Pb-Free package per JEDEC J-STD-020B.
Note 2:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 3:
DQFN package available in Tape and Reel only.
Note 4:
“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Please use order number as indicated.
© 2005 Fairchild Semiconductor Corporation
DS500107
www.fairchildsemi.com
74LCX244
Absolute Maximum Ratings
(Note 5)
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
Conditions
Units
V
V
Output in 3-STATE
Output in HIGH or LOW State (Note 6)
V
I
GND
V
O
GND
V
O
!
V
CC
V
mA
mA
mA
mA
mA
0.5 to
7.0
0.5 to
7.0
0.5 to
7.0
0.5 to V
CC
0.5
50
50
50
r
50
r
100
r
100
65 to
150
q
C
Recommended Operating Conditions
(Note 7)
Symbol
V
CC
V
I
V
O
I
OH
/I
OL
Supply Voltage
Input Voltage
Output Voltage
Output Current
HIGH or LOW State
3-STATE
V
CC
V
CC
V
CC
T
A
Free-Air Operating Temperature
Input Edge Rate, V
IN
0.8V to 2.0V, V
CC
3.0V
3.0V to 3.6V
2.7V to 3.0V
2.3V to 2.7V
Parameter
Operating
Data Retention
Min
2.0
1.5
0
0
0
Max
3.6
3.6
5.5
V
CC
5.5
Units
V
V
V
r
24
r
12
r
8
40
0
85
10
mA
q
C
ns/V
'
t/
'
V
Note 5:
The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 6:
I
O
Absolute Maximum Rating must be observed.
Note 7:
Unused inputs or I/Os must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
I
OH
I
OH
I
OH
I
OH
I
OH
V
OL
LOW Level Output Voltage
I
OL
I
OL
I
OL
I
OL
I
OL
I
I
I
OZ
I
OFF
Input Leakage Current
3-STATE Output Leakage
Power-Off Leakage Current
Conditions
V
CC
(V)
2.3 to 2.7
2.7 to 3.6
2.3 to 2.7
2.7 to 3.6
T
A
40
q
C to
85
q
C
Max
Min
1.7
2.0
Units
V
0.7
0.8
V
CC
0.2
1.8
2.2
2.4
2.2
0.2
0.6
0.4
0.4
0.55
V
100
P
A
8 mA
12 mA
18 mA
24 mA
100
P
A
8 mA
12 mA
16 mA
24 mA
2.3 to 3.6
2.3
2.7
3.0
3.0
2.3 to 3.6
2.3
2.7
3.0
3.0
2.3 to 3.6
2.3 to 3.6
0
V
V
0
d
V
I
d
5.5V
0
d
V
O
d
5.5V
V
I
V
IH
or V
IL
5.5V
V
I
or V
O
r
5.0
r
5.0
10
P
A
P
A
P
A
3
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74LCX244
DC Electrical Characteristics
Symbol
I
CC
Parameter
Quiescent Supply Current
Increase in I
CC
per Input
V
I
V
IH
(Continued)
V
CC
(V)
V
CC
or GND
V
CC
0.6V
2.3
3.6
2.3
3.6
2.3
3.6
T
A
Conditions
40
q
C to
85
q
C
Max
10
Units
Min
3.6V
d
V
I
, V
O
d
5.5V (Note 8)
r
10
500
P
A
P
A
'
I
CC
Note 8:
Outputs disabled or 3-STATE only.
AC Electrical Characteristics
T
A
Symbol
Parameter
V
CC
3.3V
r
0.3V
40
q
C to
85
q
C, R
L
V
CC
C
L
Min
1.5
1.5
1.5
1.5
1.5
1.5
2.7V
50 pF
Max
7.5
7.5
9.0
9.0
8.0
8.0
500
:
V
CC
C
L
Min
1.5
1.5
1.5
1.5
1.5
1.5
2.5V
r
0.2
30 pF
Max
7.8
7.8
10.0
10.0
8.4
8.4
ns
ns
ns
ns
Units
C
L
50 pF
Min
Max
6.5
6.5
8.0
8.0
7.0
7.0
1.0
1.0
1.5
1.5
1.5
1.5
1.5
1.5
t
PHL
t
PLH
t
PZL
t
PZH
t
PLZ
t
PHZ
t
OSHL
t
OSLH
Propagation Delay
Data to Output
Output Enable Time
Output Disable Time
Output to Output Skew
(Note 9)
Note 9:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Dynamic Switching Characteristics
Symbol
V
OLP
V
OLV
Parameter
Quiet Output Dynamic Peak V
OL
Quiet Output Dynamic Valley V
OL
C
L
C
L
C
L
C
L
50 pF, V
IH
30 pF, V
IH
50 pF, V
IH
30 pF, V
IH
Conditions
3.3V, V
IL
2.5V, V
IL
3.3V, V
IL
2.5V, V
IL
0V
0V
0V
0V
V
CC
(V)
3.3
2.5
3.3
2.5
T
A
25
q
C
0.8
0.6
Typical
Units
V
V
0.8
0.6
Capacitance
Symbol
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Parameter
V
CC
V
CC
V
CC
Open, V
I
3.3V, V
I
3.3V, V
I
Conditions
0V or V
CC
0V or V
CC
0V or V
CC
, f
10 MHz
Typical
7.0
8.0
25.0
Units
pF
pF
pF
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4
74LCX244
AC LOADING and WAVEFORMS
Generic for LCX Family
FIGURE 1. AC Test Circuit (C
L
includes probe and jig capacitance)
Test
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
, t
PHZ
Switch
Open
6V at V
CC
3.3V
r
0.3V
2.5V
r
0.2V
V
CC
x 2 at V
CC
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and t
rec
Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, t
r
= t
f
= 3ns)
Symbol
V
mi
V
mo
V
x
V
y
V
CC
3.3V
r
0.3V
1.5V
1.5V
V
OL
0.3V
V
OH
0.3V
2.7V
1.5V
1.5V
V
OL
0.3V
V
OH
0.3V
t
rise
and t
fall
2.5V
r
0.2V
V
CC
/2
V
CC
/2
V
OL
0.15V
V
OH
0.15V
5
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