ON Semiconductor’s e
2
PowerEdge family of low V
CE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (V
CE(sat)
) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
Typical applications are DC−DC converters and power management
in portable and battery powered products such as cellular and cordless
phones, PDAs, computers, printers, digital cameras and MP3 players.
Other applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
cluster. The high current gain allows e
2
PowerEdge devices to be
driven directly from PMU’s control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
•
NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC-Q101 Qualified
and PPAP Capable*
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25°C)
Rating
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
Collector Current
−
Continuous
Collector Current
−
Peak
Electrostatic Discharge
Symbol
V
CEO
V
CBO
V
EBO
I
C
I
CM
ESD
Max
−12
−12
−7.0
−2.0
−4.0
Unit
Vdc
Vdc
Vdc
A
A
NSS12200L
12 V, 4.0 A, Low V
CE(sat)
PNP Transistor
www.onsemi.com
−12
VOLTS
4.0 AMPS
PNP LOW V
CE(sat)
TRANSISTOR
EQUIVALENT R
DS(on)
65 mW
COLLECTOR
3
1
BASE
2
EMITTER
3
1
2
SOT−23 (TO−236)
CASE 318
STYLE 6
HBM Class 3B
MM Class C
MARKING DIAGRAM
VE M
G
G
1
VE = Specific Device Code
M = Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or overbar may
vary depending upon manufacturing location.
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction−to−Ambient
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction−to−Ambient
Total Device Dissipation
(Single Pulse < 10 sec.)
Junction and Storage
Temperature Range
Symbol
P
D
(Note 1)
Max
460
3.7
R
qJA
(Note 1)
P
D
(Note 2)
270
540
4.3
R
qJA
(Note 2)
P
Dsingle
(Note 3)
T
J
, T
stg
230
710
−55
to
+150
Unit
mW
mW/°C
°C/W
mW
mW/°C
°C/W
mW
°C
ORDERING INFORMATION
Device
NSS12200LT1G,
NSV12200LT1G*
Package
SOT−23
(Pb−Free)
Shipping
†
3000/Tape & Reel
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR− 4 @ 100 mm
2
, 1 oz. copper traces.
2. FR− 4 @ 500 mm
2
, 1 oz. copper traces.
3. Thermal response.
©
Semiconductor Components Industries, LLC, 2006
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NSS12200L/D
October, 2016
−
Rev. 5
1
NSS12200L
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AR
D
0.25
3
E
1
2
HE
L
L1
VIEW C
T
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
H
E
T
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0
_
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.14
0.20
2.90
3.04
1.30
1.40
1.90
2.04
0.43
0.55
0.54
0.69
2.40
2.64
−−−
10
_
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0
_
INCHES
NOM
MAX
0.039
0.044
0.002
0.004
0.017
0.020
0.006
0.008
0.114
0.120
0.051
0.055
0.075
0.080
0.017
0.022
0.021
0.027
0.094
0.104
−−−
10
_
3X
b
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
END VIEW
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
RECOMMENDED
SOLDERING FOOTPRINT*
2.90
0.90
3X
3X
0.80
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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For additional information, please contact your local
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5
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