NLAS7242
High-Speed USB 2.0
(480 Mbps) DPDT Switches
The NLAS7242 is a DPDT switch optimized for high−speed
USB 2.0 applications within portable systems. It features ultra−low on
capacitance, C
ON
= 7.5 pF (typ), and a bandwidth above 950 MHz. It
is optimized for applications that use a single USB interface connector
to route multiple signal types. The C
ON
and R
ON
of both channels are
suitably low to allow the NLAS7242 to pass any speed USB data or
audio signals going to a moderately resistive terminal such as an
external headset. The device is offered in a UQFN10 1.4 mm x 1.8 mm
package.
Features
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MARKING
DIAGRAM
•
•
•
•
•
•
•
•
•
Optimized Flow−Through Pinout
R
ON
: 5.0
W
Typ @ V
CC
= 4.2 V
C
ON
: 7.5 pF Typ @ V
CC
= 3.3 V
V
CC
Range: 1.65 V to 4.5 V
Typical Bandwidth: 950 MHz
1.4 mm x 1.8 mm x 0.50 mm UQFN10
OVT on Common Signal Pins D+/D− up to 5.25 V
8 kV HBM ESD Protection on All Pins
This is a Pb−Free Device
1
UQFN10
CASE 488AT
AD MG
G
AD
M
G
=
=
=
Device Code
Date Code
Pb−Free Device
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NLAS7242MUTBG
Package
UQFN0
(Pb−Free)
Shipping
†
3000/Tape & Reel
Typical Applications
•
High Speed USB 2.0 Data
•
Mobile Phones
•
Portable Devices
NLAS7242
HS
USB
XCVR
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
USB CONNECTOR
FS USB
XCVR or
AUDIO
AMP
Figure 1. Application Diagram
©
Semiconductor Components Industries, LLC, 2009
August, 2009
−
Rev. 4
1
Publication Order Number:
NLAS7242/D
NLAS7242
HSD2+
7
HSD2−
6
OE
V
CC
8
5
HSD1+
HSD1−
GND
9
4
CONTROL
S
10
3
1
2
Figure 2. Pin Connections and Logic Diagram
(Top View)
Table 1. PIN DESCRIPTION
Pin
S
OE
HSD1+, HSD1−, HSD2+,
HSD2−, D+, D−
Function
Control Input
Output Enable
Data Ports
OE
1
0
0
S
X
0
1
D+
D−
Table 2. TRUTH TABLE
HSD1+,
HSD1−
OFF
ON
OFF
HSD2+,
HSD2−
OFF
OFF
ON
MAXIMUM RATINGS
Symbol
V
CC
V
IS
Pins
V
CC
HSDn+,
HSDn−
D+, D−
V
IN
I
CC
T
S
I
IS_CON
HSDn+,
HSDn−,
D+, D−
HSDn+,
HSDn−,
D+, D−
S, OE
S, OE
V
CC
Control Input Voltage, Output Enable Voltage
Positive DC Supply Current
Storage Temperature
Analog Signal Continuous Current−Closed Switch
Parameter
Positive DC Supply Voltage
Analog Signal Voltage
Value
−0.5
to +5.5
−0.5
to V
CC
+ 0.3
−0.5
to +5.25
−0.5
to +5.5
50
−65
to +150
$300
V
mA
°C
mA
Unit
V
V
I
IS_PK
Analog Signal Continuous Current 10% Duty Cycle
$500
mA
I
IN
Control Input Current, Output Enable Current
$20
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IS
HSDn+,
HSDn−
D+, D−
V
IN
T
A
S, OE
Control Input Voltage, Output Enable Voltage
Operating Temperature
Pins
Analog Signal Voltage
Parameter
Positive DC Supply Voltage
Min
1.65
GND
GND
GND
−40
Max
4.5
V
CC
4.5
V
CC
+85
V
°C
Unit
V
V
Minimum and maximum values are guaranteed through test or design across the Recommended Operating Conditions, where applicable.
Typical values are listed for guidance only and are based on the particular conditions listed for section, where applicable. These conditions
are valid for all values found in the characteristics tables unless otherwise specified in the test conditions.
ESD PROTECTION
Symbol
ESD
Human Body Model
−
All Pins
Parameter
Value
8.0
Unit
kV
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2
NLAS7242
DC ELECTRICAL CHARACTERISTICS
CONTROL INPUT, OUTPUT ENABLE VOLTAGE
(Typical: T = 25°C)
−40°C
to +85°C
Symbol
V
IH
Pins
S, OE
Parameter
Control Input, Output
Enable HIGH Voltage
(See Figure 11)
Control Input, Output
Enable LOW Voltage
(See Figure 11)
Current Input, Output
Enable Leakage Current
0
≤
V
IS
≤
V
CC
Test Conditions
V
CC
(V)
2.7
3.3
4.2
2.7
3.3
4.2
1.65
−
4.5
Min
1.25
1.3
1.4
−
Typ
−
Max
−
Unit
V
V
IL
S, OE
−
0.35
0.4
0.5
±1.0
V
I
IN
S, OE
−
−
mA
SUPPLY CURRENT AND LEAKAGE
(Typical: T = 25°C, V
CC
= 3.3 V)
−40°C
to +85°C
Symbol
I
CC
I
OZ
I
OFF
D+, D−
Pins
V
CC
Parameter
Quiescent Supply Current
OFF State Leakage
Power OFF Leakage
Current
Test Conditions
0
≤
V
IS
≤
V
CC
; I
D
= 0 A
0
≤
V
IS
≤
V
CC
−
0.5 V
0
≤
V
IS
≤
V
CC
0
≤
V
IS
≤
V
CC
V
CC
(V)
1.65
−
3.6
3.6
−
4.5
1.65
−
4.5
0
Min
−
−
−
−
Typ
−
−
±0.1
−
Max
1.0
1.0
±1.0
±1.0
Unit
mA
mA
mA
LIMITED V
IS
SWING ON RESISTANCE
(Typical: T = 25°C)
−40°C
to +85°C
Symbol
R
ON
Pins
Parameter
On−Resistance (Note 1)
Test Conditions
I
ON
= 8 mA
V
IS
= 0 V to 0.4 V
I
ON
= 8 mA
V
IS
= 0 V to 0.4 V
I
ON
= 8 mA
V
IS
= 0 V to 0.4 V
V
CC
(V)
2.7
3.3
4.2
2.7
3.3
4.2
2.7
3.3
4.2
Min
−
Typ
6.0
5.5
5.0
0.55
0.30
0.20
0.60
0.60
0.60
Max
8.6
7.6
7.0
−
Unit
W
R
FLAT
On−Resistance Flatness
(Notes 1 and 2)
On−Resistance Matching
(Notes 1 and 3)
−
W
DR
ON
−
−
W
1. Guaranteed by design.
2. Flatness is defined as the difference between the maximum and minimum value of On−Resistance as measured over the specified analog
signal ranges.
3.
DR
ON
= R
ON(max)
−
R
ON(min)
between HSD1
+
and HSD1
−
or HSD2
+
and HSD2
−
.
FULL V
IS
SWING ON RESISTANCE
(Typical: T = 25°C)
−40°C
to +85°C
Symbol
R
ON
Pins
Parameter
On−Resistance
Test Conditions
I
ON
= 8 mA
V
IS
= 0 V to V
CC
I
ON
= 8 mA
V
IS
= 0 V to V
CC
I
ON
= 8 mA
V
IS
= 0 V to V
CC
V
CC
(V)
2.7
3.3
4.2
2.7
3.3
4.2
2.7
3.3
4.2
Min
−
Typ
10
8.0
7.0
4.5
3.0
2.5
0.60
0.60
0.60
Max
13.5
9.75
8.50
−
Unit
W
R
FLAT
On−Resistance Flatness
(Notes 4 and 5)
On−Resistance
(Note 4 and 6)
−
W
DR
ON
−
−
W
4. Guaranteed by design.
5. Flatness is defined as the difference between the maximum and minimum value of On−Resistance as measured over the specified analog
signal ranges.
6.
DR
ON
= R
ON(max)
−
R
ON(min)
between HSD1
+
and HSD1
−
or HSD2
+
and HSD2
−
.
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3
NLAS7242
AC ELECTRICAL CHARACTERISTICS
TIMING/FREQUENCY
(Typical: T = 25°C, V
CC
= 3.3 V, R
L
= 50
W,
C
L
= 35 pF, f = 1 MHz)
−405C
to +855C
Symbol
t
ON
t
OFF
T
BBM
BW
Pins
Closed to Open
Open to Closed
Parameter
Turn−ON Time
(See Figures 4 and 5)
Turn−OFF Time
(See Figures 4 and 5)
Break−Before−Make
Time (See Figure 3)
−3
dB Bandwidth
(See Figure 10)
C
L
= 5 pF
Test Conditions
V
CC
(V)
1.65
−
4.5
1.65
−
4.5
1.65
−
4.5
1.65
−
4.5
Min
−
−
2.0
−
Typ
13.0
12.0
−
950
Max
30.0
25.0
−
−
Unit
ns
ns
ns
MHz
ISOLATION
(Typical: T = 25°C, V
CC
= 3.3 V, R
L
= 50
W,
C
L
= 5 pF)
−405C
to +855C
Symbol
O
IRR
X
TALK
Pins
Open
HSDn+ to HSDn−
Parameter
OFF−Isolation
(See Figure 6)
Non−Adjacent Channel
Crosstalk
Test Conditions
f = 240 MHz
f = 240 MHz
V
CC
(V)
1.65
−
4.5
1.65
−
4.5
Min
−
−
Typ
−22
−24
Max
−
−
Unit
dB
dB
CAPACITANCE
(Typical: T = 25°C, V
CC
= 3.3 V, R
L
= 50
W,
C
L
= 5 pF)
−405C
to +855C
Symbol
C
IN
C
ON
Pins
S, OE
D+ to
HSD1+ or
HSD2+
Parameter
Control Pin, Output Enable
Input Capacitance
ON Capacitance
Test Conditions
V
CC
= 0 V, f = 1 MHz
V
CC
= 0 V, f = 10 MHz
V
CC
= 3.3 V; OE = 0 V, f = 1 MHz
S = 0 V or 3.3 V
V
CC
= 3.3 V; OE = 0 V, f = 10 MHz
S = 0 V or 3.3 V
OFF Capacitance
V
CC
= V
IS
= 3.3 V;
OE = 0 V, S = 3.3 V or 0 V,
f = 1 MHz
V
CC
= V
IS
= 3.3 V;
OE = 0 V, S = 3.3 V or 0 V,
f = 10 MHz
Min
−
−
−
−
−
Typ
1.5
1.0
7.5
6.5
3.8
Max
−
−
−
−
−
Unit
pF
C
OFF
HSD1n or
HSD2n
−
2.0
−
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4
NLAS7242
DUT
V
CC
0.1
mF
50
W
Output
V
OUT
35 pF
Output
Switch Select Pin
50 % OF
DROOP
Input
GND
t
BMM
VOLTAGE
DROOP
V
CC
Figure 3. t
BBM
(Time Break−Before−Make)
V
CC
DUT
V
CC
0.1
mF
Open
Output
V
OUT
50
W
35 pF
Output
V
OL
Input
t
ON
t
OFF
Input
0V
V
OH
50%
50%
90%
90%
Figure 4. t
ON
/t
OFF
V
CC
DUT
Output
Open
50
W
V
OUT
35 pF
Input
V
CC
50%
0V
V
OH
Output
V
OL
10%
t
OFF
t
ON
10%
50%
Input
Figure 5. t
ON
/t
OFF
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