Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq. [1 oz] including traces).
3. Pulse Test: pulse width
v
300
ms,
duty cycle
v
2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NTR4502P, NVTR4502P
5
−I
D
, DRAIN CURRENT (A)
4
3
2
1
0
0
1
2
3
4
5
6
7
8
9
10
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
= −4.0 V
V
GS
= −5.0 V
V
GS
= −7.0 V
V
GS
= −10 V
T
J
= 25°C
V
GS
= −3.8 V
V
GS
= −3.6 V
V
GS
= −3.4 V
V
GS
= −3.2 V
V
GS
= −3.0 V
V
GS
= −2.4 V
V
GS
= −2.8 V
V
GS
= −2.6 V
5
−I
D
, DRAIN CURRENT (A)
4
3
2
1
0
V
DS
= −10 V
T
J
= −55°C
T
J
= 25°C
T
J
= 100°C
1
2
3
4
5
6
7
−V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.4
0.35
0.3
0.25
0.2
0.15
0.1
3
4
5
6
7
8
9
10
0.3
T
J
= 25°C
V
GS
= −4.5 V
0.25
I
D
= −1.95 A
T
J
= 25°C
0.2
V
GS
= −10 V
0.15
0.1
1
1.5
2
2.5
3
3.5
4
4.5
5
−I
D
, DRAIN CURRENT (A)
−V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
1.8
1.6
1.4
1.2
1
0.8
0.6
−50
−25
0
25
50
75
100
125
150
I
D
= −1.9 A
V
GS
= −10 V
1000
V
GS
= 0 V
T
J
= 150°C
100
−I
DSS
, LEAKAGE (nA)
10
T
J
= 100°C
1
2
6
10
14
18
22
26
30
T
J
, JUNCTION TEMPERATURE (°C)
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
NTR4502P, NVTR4502P
500
V
DS
= 0 V
C, CAPACITANCE (pF)
400
C
ISS
C
RSS
C
ISS
C
OSS
100
C
RSS
V
GS
= 0 V
T
J
= 25°C
300
200
0
10
5
0
5
10
15
20
25
30
−V
GS
−V
DS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (V)
Figure 7. Capacitance Variation
Q
T
10
8
6
15
12
9
Q
GS
4
2
0
0
1
Q
GD
6
3
0
2
3
4
5
6
7
I
D
= −1.95 A
T
J
= 25°C
Q
G
, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
100
V
DS
= −15 V
I
D
= −1.95 V
V
GS
= −10 V
t
d(off)
t, TIME (ns)
10
t
d(on)
t
r
t
f
3
T
J
= 25°C
−I
S
, SOURCE CURRENT
2.5
2
1.5
1
0.5
0
1
1
10
R
G
, GATE RESISTANCE (W)
100
0.3
0.6
−V
DS
, DRAIN−TO−SOURCE VOLTAGE
(V)
0.9
12
18
−V
GS
, GATE−TO−SOURCE VOLTAGE
(V)
1.2
−V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
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4
NTR4502P, NVTR4502P
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AR
D
0.25
3
E
1
2
HE
L
3X
b
T
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
H
E
T
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0
°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.14
0.20
2.90
3.04
1.30
1.40
1.90
2.04
0.43
0.55
0.54
0.69
2.40
2.64
−−−
10
°
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0
°
INCHES
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10
°
e
TOP VIEW
L1
VIEW C
A
A1
SIDE VIEW
SEE VIEW C
c
END VIEW
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
RECOMMENDED
SOLDERING FOOTPRINT*
2.90
3X
0.90
3X
0.80
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage
may be accessed at
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ON Semiconductor reserves the right to make changes without further notice to any products herein.
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