The NST3906DP6T5G device is a spin−off of our popular
SOT−23/SOT−323/SOT−563 three−leaded device. It is designed for
general purpose amplifier applications and is housed in the SOT−963
six−leaded surface mount package. By putting two discrete devices in
one package, this device is ideal for low−power surface mount
applications where board space is at a premium.
Features
NST3906DP6T5G
Dual General Purpose
Transistor
www.onsemi.com
(3)
(2)
(1)
•
•
•
•
•
•
h
FE
, 100−300
Low V
CE(sat)
,
≤
0.4 V
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
This is a Pb−Free Device
Rating
Collector
−Emitter
Voltage
Collector
−Base
Voltage
Emitter
−Base
Voltage
Collector Current
−
Continuous
Symbol
V
CEO
V
CBO
V
EBO
I
C
HBM
MM
ESD
Class
Value
−40
−40
−5.0
−200
2
B
Unit
V
V
V
mA
Q
1
Q
2
(4)
(5)
NST3906DP6T5G
(6)
MAXIMUM RATINGS
Electrostatic Discharge
SOT−963
CASE 527AD
THERMAL CHARACTERISTICS
Characteristic (Single Heated)
Total Device Dissipation T
A
= 25°C
Derate above 25°C (Note 1)
Thermal Resistance, Junction-to-Ambient
(Note 1)
Total Device Dissipation T
A
= 25°C
Derate above 25°C (Note 2)
Thermal Resistance, Junction-to-Ambient
(Note 2)
Characteristic (Dual Heated) (Note 3)
Total Device Dissipation T
A
= 25°C
Derate above 25°C (Note 1)
Thermal Resistance, Junction-to-Ambient
(Note 1)
Total Device Dissipation T
A
= 25°C
Derate above 25°C (Note 2)
Thermal Resistance, Junction-to-Ambient
(Note 2)
Junction and Storage Temperature Range
Symbol
P
D
R
qJA
P
D
R
qJA
Symbol
P
D
R
qJA
P
D
R
qJA
T
J
, T
stg
Max
240
1.9
520
280
2.2
446
Max
350
2.8
357
420
3.4
297
−55
to
+150
Unit
mW
mW/°C
°C/W
mW
mW/°C
°C/W
Unit
mW
mW/°C
°C/W
mW
mW/°C
°C/W
°C
1
F
M
= Device Code
= Date Code
MARKING DIAGRAM
F M
ORDERING INFORMATION
Device
NST3906DP6T5G
Package
SOT−963
(Pb−Free)
Shipping
†
8000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−4 @ 100 mm
2
, 1 oz. copper traces, still air.
2. FR−4 @ 500 mm
2
, 1 oz. copper traces, still air.
3. Dual heated values assume total power is sum of two equally powered channels.
©
Semiconductor Components Industries, LLC, 2008
June, 2017
−
Rev. 1
1
Publication Order Number:
NST3906DP6/D
NST3906DP6T5G
PACKAGE DIMENSIONS
SOT−963
CASE 527AD
ISSUE E
D
X
Y
4
E
1
2
3
C
SIDE VIEW
6X
A
6
5
H
E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM
A
b
C
D
E
e
H
E
L
L2
MILLIMETERS
MIN
NOM
MAX
0.34
0.37
0.40
0.10
0.15
0.20
0.07
0.12
0.17
0.95
1.00
1.05
0.75
0.80
0.85
0.35 BSC
0.95
1.00
1.05
0.19 REF
0.05
0.10
0.15
TOP VIEW
e
L
6X
L2
6X
b
0.08 X Y
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT*
0.20
PACKAGE
OUTLINE
6X
0.35
6X
1.20
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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coverage may be accessed at
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