Philips Semiconductors
Product specification
Quad buffers (3-State)
74F125, 74F126
FEATURE
•
High impedance NPN base inputs for reduced loading
(20µA in High and Low states)
ORDERING INFORMATION
DESCRIPTION
14-pin plastic DIP
14-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F125N, N74F126N
N74F125D, N74F126D
PKG DWG #
SOT27-1
SOT108-1
TYPE
74F125
74F126
TYPICAL
PROPAGATION
DELAY
5.0ns
5.0ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
23mA
26mA
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
D0–D3
OE0–OE3
OE0–OE3
Q0–Q3
Data inputs
Output Enable inputs (active Low), 74F125
Output Enable inputs (active High), 74F126
Data outputs
DESCRIPTION
74F (U.L.) HIGH/LOW
1.0/0.033
1.0/0.033
1.0/0.033
750/106.7
LOAD VALUE HIGH/LOW
20µA/20µA
20µA/20µA
20µA/20µA
15mA/64mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
PIN CONFIGURATIONS
74F125
OE0
D0
Q0
OE1
D1
Q1
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
OE3
D3
Q3
OE2
D2
Q2
OE0
D0
Q0
OE1
D1
Q1
GND
1
2
3
4
5
6
7
74F126
14
13
12
11
10
9
8
V
CC
OE3
D3
Q3
OE2
D2
Q2
SF00117
SF00118
LOGIC SYMBOLS
74F125
2
5
9
12
2
74F126
5
9
12
D0
1
4
10
13
OE0
OE1
OE2
OE3
Q0
D1
D2
D3
1
4
10
13
OE0
OE1
OE2
OE3
D0
D1
D2
D3
Q0
Q1
Q1
Q0
Q0
Q1
Q1
V
CC
= Pin 14
GND = Pin 7
3
6
8
11
V
CC
= Pin 14
GND = Pin 7
3
6
8
11
SF00119
SF00120
March 28, 1989
2
853–0341 96146
Philips Semiconductors
Product specification
Quad buffers (3-State)
74F125, 74F126
IEC/IEEE SYMBOLS
74F125
1
2
4
6
5
10
8
9
13
11
12
12
9
13
11
5
10
8
74F126
1
3
2
4
6
EN
1
EN
1
3
SF00121
SF00122
LOGIC DIAGRAMS
74F125
1
OE0
2
D0
4
OE1
5
D1
10
OE2
9
D2
13
OE3
12
D3
V
CC
= Pin 14
GND = Pin 7
11
Q3
V
CC
= Pin 14
GND = Pin 7
OE3
12
D3
11
Q3
8
Q2
OE2
9
D2
13
8
Q2
6
Q1
OE1
5
D1
10
6
Q1
3
Q0
OE0
2
D0
4
3
Q0
1
74F126
SF00123
SF00124
FUNCTION TABLE, 74F125
I NPUTS
OEn
L
L
H
Dn
L
H
X
OUTPUT
Qn
L
H
Z
FUNCTION TABLE, 74F126
I NPUTS
OEn
H
H
L
Dn
L
H
X
OUTPUT
Qn
L
H
Z
NOTES TO THE FUNCTION TABLES:
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
3
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
128
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
March 28, 1989
Philips Semiconductors
Product specification
Quad buffers (3-State)
74F125, 74F126
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free air temperature range
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–15
64
+70
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
I
O
= 3mA
OH
=–3mA
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
±10%V
CC
I
O
= MAX
OH
±5%V
CC
0.42
–0.73
2.4
2.7
2.0
2.0
0.55
0.55
–1.2
100
20
–20
50
–50
–100
OEn = GND, Dn = 4.5V
V
CC
= MAX
OEn = Dn = GND
OEn = Dn = 4.5V
OEn = Dn = 4.5V
V
CC
= MAX
OEn = 4.5V, Dn = GND
OEn = GND, Dn = 4.5V
17
28
25
20
32
26
–225
24
40
35
30
48
39
3.3
LIMITS
TYP
2
UNIT
MAX
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
mA
mA
mA
mA
mA
mA
mA
V
O
OH
High-level
High level output voltage
V
CC
= MIN,
V
IL
= MAX,
MAX
V
IH
= MIN
I
O
= 15mA
OH
=–15mA
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Off-state output current,
High-level voltage applied
Off-state output current,
Low-level voltage applied
Short circuit output current
3
I
CCH
74F125
I
CCL
I
CCZ
I
CCH
74F126
I
CCL
I
CCZ
V
CC
= MIN,
V
IL
= MAX,
MAX
V
IH
= MIN
V
CC
= MIN, I
I
= I
IK
V
CC
= 0.0V, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX, V
O
= 2.7V
V
CC
= MAX, V
O
= 0.5V
V
CC
= MAX
I
CC
Supply current (total)
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
March 28, 1989
4
Philips Semiconductors
Product specification
Quad buffers (3-State)
74F125, 74F126
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5.0V
T
amb
= +25°C
C
L
= 50pF, R
L
= 500Ω
MIN
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
Dn to Qn
Output Enable time
to High or Low level
Output Disable time
from High or Low level
Propagation delay
Dn to Qn
Output Enable time
to High or Low level
Output Disable time
from High or Low level
74F126
74F125
Waveform 1
Waveform 2
Waveform 3
Waveform 2
Waveform 3
Waveform 1
Waveform 2
Waveform 3
Waveform 2
Waveform 3
2.0
3.0
3.5
4.0
1.5
1.5
2.0
3.0
4.0
4.0
2.0
3.0
TYP
4.0
5.5
5.5
6.0
3.5
3.5
4.0
5.5
6.0
6.0
4.5
5.5
MAX
6.0
7.5
7.5
8.0
5.0
5.5
6.5
8.0
7.5
8.0
6.5
7.5
V
CC
= +5.0V
±
10%
T
amb
= 0°C to +70°C
C
L
= 50pF, R
L
= 500Ω
MIN
2.0
3.0
3.5
4.0
1.5
1.5
2.0
3.0
3.5
3.5
2.0
3.0
MAX
6.5
8.0
8.5
9.0
6.0
6.0
7.0
8.5
8.5
8.5
7.5
8.0
ns
ns
ns
ns
ns
ns
UNIT
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
OEn
Dn
V
M
t
PLH
V
M
t
PHL
Qn
V
M
OEn
t
PZL
t
PLZ
V
M
Qn
V
M
V
M
V
M
V
OL
+0.3V
SF00125
SF00127
Waveform 1. Propagation Delay for Input to Output
Waveform 3. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
OEn
V
M
OEn
t
PZH
t
PHZ
V
OH
–0.3V
0V
V
M
Qn
V
M
SF00126
Waveform 2. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
March 28, 1989
5
NXP MCU
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