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74AUP1G125GW-Q100H

产品描述逻辑电路的归属系列:74AUP 逻辑类型:缓冲器,非反向 元件数:1 每元件位数:1
产品类别逻辑    逻辑   
文件大小697KB,共19页
制造商Nexperia
官网地址https://www.nexperia.com
标准
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74AUP1G125GW-Q100H概述

逻辑电路的归属系列:74AUP 逻辑类型:缓冲器,非反向 元件数:1 每元件位数:1

74AUP1G125GW-Q100H规格参数

参数名称属性值
Brand NameNexperia
是否Rohs认证符合
厂商名称Nexperia
零件包装代码TSSOP
包装说明TSSOP-5
针数5
制造商包装代码SOT353-1
Reach Compliance Codecompliant
Samacsys DescriptionBuffers & Line Drivers Low-power buffer/ line driver
系列AUP/ULP/V
JESD-30 代码R-PDSO-G5
长度2.05 mm
逻辑集成电路类型BUS DRIVER
位数1
功能数量1
端口数量2
端子数量5
最高工作温度125 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度)NOT SPECIFIED
传播延迟(tpd)24 ns
筛选级别AEC-Q100
座面最大高度1.1 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)0.8 V
标称供电电压 (Vsup)1.1 V
表面贴装YES
技术CMOS
温度等级AUTOMOTIVE
端子形式GULL WING
端子节距0.65 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度1.25 mm

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74AUP1G125-Q100
Low-power buffer/line driver; 3-state
Rev. 1 — 20 March 2013
Product data sheet
1. General description
The 74AUP1G125-Q100 provides a single non-inverting buffer/line driver with 3-state
output. The 3-state output is controlled by the output enable input (OE). A HIGH level at
pin OE causes the output to assume a high-impedance OFF-state. This device has the
input-disable feature, which allows floating input signals. The inputs are disabled when the
output enable input OE) is HIGH.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V. This device ensures a very low
static and dynamic power consumption across the entire V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V
HBM JESD22-A114F Class 3A. Exceeds 5000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
Input-disable feature allows floating input conditions
I
OFF
circuitry provides partial Power-down mode operation

 
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