74AHC2G00; 74AHCT2G00
Dual 2-input NAND gate
Rev. 5 — 7 March 2019
Product data sheet
1. General description
The 74AHC2G00; 74AHCT2G00 are high-speed Si-gate CMOS devices. They provide two 2-input
NAND gates.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features and benefits
•
•
•
Symmetrical output impedance
High noise immunity
ESD protection:
•
HBM JESD22-A114F exceeds 2000 V
•
MM JESD22-A115-A exceeds 200 V
•
CDM JESD22-C101C exceeds 1000 V
Low power dissipation
Balanced propagation delays
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
•
•
•
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74AHC2G00DP
74AHC2G00DC
74AHCT2G00DC
-40 °C to +125 °C
-40 °C to +125 °C
TSSOP8
VSSOP8
Description
Version
plastic thin shrink small outline package; 8 leads; SOT505-2
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
SOT765-1
4. Marking
Table 2. Marking
Type number
74AHC2G00DP
74AHC2G00DC
74AHCT2G00DC
[1]
Marking code[1]
A00
A00
C00
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Nexperia
74AHC2G00; 74AHCT2G00
Dual 2-input NAND gate
5. Functional diagram
&
1A
1B
2A
2B
1Y
2Y
001aah748
&
001aah749
Fig. 1.
Logic symbol
B
Fig. 2.
IEC logic symbol
Y
A
mna099
Fig. 3.
Logic diagram (one gate)
6. Pinning information
6.1. Pinning
74AHC2G00
74AHCT2G00
1A
1B
2Y
GND
1
2
3
4
001aaj388
8
7
6
5
V
CC
1Y
2B
2A
Fig. 4.
Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
6.2. Pin description
Table 3. Pin description
Symbol
1A, 2A
1B, 2B
GND
1Y, 2Y
V
CC
Pin
1, 5
2, 6
4
7, 3
8
Description
data input
data input
ground (0 V)
data output
supply voltage
74AHC_AHCT2G00
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 5 — 7 March 2019
2 / 11
Nexperia
74AHC2G00; 74AHCT2G00
Dual 2-input NAND gate
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level.
Input
nA
L
L
H
H
nB
L
H
L
H
Output
nY
H
H
H
L
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
-0.5
-0.5
Max
+7.0
+7.0
-
±20
±25
75
-
+150
250
Unit
V
V
mA
mA
mA
mA
mA
°C
mW
V
I
< -0.5 V
V
O
< -0.5 V or V
O
> V
CC
+ 0.5 V
-0.5 V < V
O
< V
CC
+ 0.5 V
[1]
[1]
-20
-
-
-
-75
-65
T
amb
= -40 °C to +125 °C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55 °C the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 °C the value of P
tot
derates linearly with 8 mW/K.
9. Recommended operating conditions
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
Δt/ΔV
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and V
CC
= 3.3 V ± 0.3 V
fall rate
V
CC
= 5.0 V ± 0.5 V
Conditions
Min
2.0
0
0
-40
-
-
74AHC2G00
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
100
20
4.5
0
0
-40
-
-
74AHCT2G00
Min
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
-
20
V
V
V
°C
ns/V
ns/V
Unit
74AHC_AHCT2G00
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 5 — 7 March 2019
3 / 11
Nexperia
74AHC2G00; 74AHCT2G00
Dual 2-input NAND gate
10. Static characteristics
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74AHC2G00
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
OH
V
I
= V
IH
or V
IL
HIGH-level
output voltage
I
O
= -50 μA; V
CC
= 2.0 V
I
O
= -50 μA; V
CC
= 3.0 V
I
O
= -50 μA; V
CC
= 4.5 V
I
O
= -4.0 mA; V
CC
= 3.0 V
I
O
= -8.0 mA; V
CC
= 4.5 V
V
OL
V
I
= V
IH
or V
IL
LOW-level
output voltage
I
O
= 50 μA; V
CC
= 2.0 V
I
O
= 50 μA; V
CC
= 3.0 V
I
O
= 50 μA; V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
I
I
CC
C
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2.0
3.0
4.5
-
-
0
0
0
-
-
-
-
1.5
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.36
0.36
0.1
10
10
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.48
3.8
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
1.0
10
10
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.40
3.70
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
2.0
40
10
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
μA
μA
pF
Conditions
Min
25 °C
Typ
Max
-40 °C to +85 °C
Min
Max
-40 °C to +125 °C Unit
Min
Max
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
input
capacitance
HIGH-level
input voltage
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
74AHCT2G00
V
IH
V
IL
V
OH
2.0
-
-
-
-
0.8
2.0
-
-
0.8
2.0
-
-
0.8
V
V
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
HIGH-level
output voltage
I
O
= -50 μA
I
O
= -8.0 mA
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
LOW-level
output voltage
I
O
= 50 μA
I
O
= 8.0 mA
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
4.4
3.94
-
-
-
-
4.5
-
0
-
-
-
-
-
0.1
0.36
0.1
1.0
4.4
3.8
-
-
-
-
-
-
0.1
0.44
1.0
10
4.4
3.70
-
-
-
-
-
-
0.1
0.55
2.0
40
V
V
V
V
μA
μA
V
OL
I
I
I
CC
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
74AHC_AHCT2G00
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 5 — 7 March 2019
4 / 11
Nexperia
74AHC2G00; 74AHCT2G00
Dual 2-input NAND gate
Conditions
Min
-
25 °C
Typ
-
Max
1.35
-40 °C to +85 °C
Min
-
Max
1.5
-40 °C to +125 °C Unit
Min
-
Max
1.5
mA
Symbol Parameter
ΔI
CC
additional
per input pin; V
I
= 3.4 V;
supply current other inputs at V
CC
or GND;
I
O
= 0 A; V
CC
= 5.5 V
input
capacitance
C
I
-
1.5
10
-
10
-
10
pF
11. Dynamic characteristics
Table 8. Dynamic characteristics
GND = 0 V; for test circuit see
Fig. 6.
Symbol Parameter
74AHC2G00
t
pd
propagation
delay
nA, nB to nY; see
Fig. 5
V
CC
= 3.0 V to 3.6 V;
C
L
= 15 pF
C
L
= 50 pF
V
CC
= 4.5 V to 5.5 V;
C
L
= 15 pF
C
L
= 50 pF
C
PD
power
per buffer;
dissipation
C
L
= 50 pF; f
i
= 1 MHz;
capacitance V
I
= GND to V
CC
propagation
delay
nA, nB to nY; see
Fig. 5
V
CC
= 4.5 V to 5.5 V;
C
L
= 15 pF
C
L
= 50 pF
C
PD
power
per buffer;
dissipation
C
L
= 50 pF; f
i
= 1 MHz;
capacitance V
I
= GND to V
CC
[4]
[4]
[3]
-
-
-
3.5
4.9
17
5.5
7.5
-
1.0
1.0
-
6.5
8.5
-
1.0
1.0
-
7.0
9.5
-
ns
ns
pF
[1]
[2]
-
-
4.5
6.5
7.9
11.4
1.0
1.0
9.5
13.0
1.0
1.0
10.5
14.5
ns
ns
Conditions
Min
25 °C
Typ
Max
-40 °C to +85 °C
Min
Max
-40 °C to +125 °C Unit
Min
Max
74AHCT2G00
t
pd
[1]
[3]
1.0
1.0
-
3.6
5.0
18
6.2
7.9
-
1.0
1.0
-
7.1
9.0
-
1.0
1.0
-
8.0
10.0
-
ns
ns
pF
[1]
[2]
[3]
[4]
t
pd
is the same as t
PLH
and t
PHL
.
Typical values are measured at V
CC
= 3.3 V.
Typical values are measured at V
CC
= 5.0 V.
C
PD
is used to determine the dynamic power dissipation (P
D
in μW).
2
2
P
D
= C
PD
x V
CC
x f
i
x N + Σ(C
L
x V
CC
x f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
2
Σ(C
L
x V
CC
x f
o
) = sum of the outputs.
74AHC_AHCT2G00
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 5 — 7 March 2019
5 / 11
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