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74LVC162373ADGG,11: 产品描述电压-电源：1.2V ~ 3.6V 逻辑类型：D 型透明锁存器输出类型：三态系列：74LVC; 产品类别逻辑逻辑; 文件大小720KB，共18页; 制造商Nexperia; 官网地址https://www.nexperia.com

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74LVC162373ADGG,11概述

电压-电源：1.2V ~ 3.6V 逻辑类型：D 型透明锁存器输出类型：三态系列：74LVC

74LVC162373ADGG,11规格参数

参数名称	属性值
Brand Name	Nexperia
厂商名称	Nexperia
零件包装代码	TSSOP
包装说明	TSSOP,
针数	48
制造商包装代码	SOT362-1
Reach Compliance Code	compliant
Samacsys Description	74LVC(H)162373A - 16-bit D-type transparent latch@en-us
系列	LVC/LCX/Z
JESD-30 代码	R-PDSO-G48
长度	12.5 mm
逻辑集成电路类型	BUS DRIVER
位数	8
功能数量	2
端口数量	2
端子数量	48
最高工作温度	125 °C
最低工作温度	-40 °C
输出特性	3-STATE WITH SERIES RESISTOR
输出极性	TRUE
封装主体材料	PLASTIC/EPOXY
封装代码	TSSOP
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）	NOT SPECIFIED
传播延迟（tpd）	18.5 ns
座面最大高度	1.2 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	1.2 V
标称供电电压 (Vsup)	1.8 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子形式	GULL WING
端子节距	0.5 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED
宽度	6.1 mm
Base Number Matches	1

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74LVC162373A; 74LVCH162373A

16-bit D-type transparent latch; 30



series termination

resistors; 5 V tolerant inputs/outputs; 3-state

Rev. 4 — 14 May 2013

Product data sheet

1. General description

The 74LVC162373A and 74LVCH162373A are 16-bit D-type transparent latches with

separate D-type inputs with bus hold (74LVCH162373A only) for each latch and 3-state

outputs for bus-oriented applications. One latch enable (pin nLE) input and one output

enable (pin nOE) are provided for each octal. Inputs can be driven from either 3.3 V or 5 V

devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow

the use of these devices in mixed 3.3 V and 5 V applications. The device consists of two

sections of eight D-type transparent latches with 3-state true outputs. When pin nLE is

HIGH, data at the corresponding data inputs (pins nDn) enter the latches. In this condition,

the latches are transparent, that is, the latch output changes each time its corresponding

data inputs changes. When pin nLE is LOW, the latches store the information that was

present at the data inputs a set-up time preceding the HIGH to LOW transition of pin

nLE.When pin nOE is LOW, the contents of the eight latches are available at the outputs.

When pin nOE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the

nOE input does not affect the state of the latches.

The device is designed with 30



series termination resistors in both HIGH and LOW

output stages to reduce line noise. Bus hold on data inputs eliminates the need for

external pull-up resistors to hold unused inputs.

2. Features and benefits



5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Multibyte flow-through standard pinout architecture

Multiple low inductance supply pins for minimum noise and ground bounce

Direct interface with TTL levels

All data inputs have bus hold (74LVCH162373A only)

High-impedance when V

= 0 V

Complies with JEDEC standard:



JESD8-7A (1.65 V to 1.95 V)



JESD8-5A (2.3 V to 2.7 V)



JESD8-C/JESD36 (2.7 V to 3.6 V)

74LVC162373ADGG,11相似产品对比

	74LVC162373ADGG,11	74LVCH162373ADGG,1	74LVCH162373ADGG:1	74LVC162373ADGG:11	74LVC162373ADL,118	74LVCH162373ADL:11	74LVCH162373ADL,11	74LVCH162373ADGG:5	74LVC162373ADGG:51
描述	电压-电源：1.2V ~ 3.6V 逻辑类型：D 型透明锁存器输出类型：三态系列：74LVC	74LVC(H)162373A - 16-bit D-type transparent latch; 30 Ohm series termination resistors; 5 V tolerant inputs/outputs; 3-state TSSOP 48-Pin	IC 16BIT D TRANSP LATCH 48TSSOP	IC 16BIT D TRANSP LATCH 48TSSOP	IC 16BIT D TRANSP LATCH 48SSOP	IC 16BIT D TRANSP LATCH 48SSOP	IC 16BIT D TRANSP LATCH 48SSOP	74LVC(H)162373A - 16-bit D-type transparent latch; 30 Ohm series termination resistors; 5 V tolerant inputs/outputs; 3-state TSSOP 48-Pin	74LVC(H)162373A - 16-bit D-type transparent latch; 30 Ohm series termination resistors; 5 V tolerant inputs/outputs; 3-state TSSOP 48-Pin
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
零件包装代码	TSSOP	TSSOP	TSSOP	TSSOP	SSOP	SSOP	SSOP	TSSOP	TSSOP
包装说明	TSSOP,	TSSOP,	TSSOP,	TSSOP,	SSOP,	SSOP,	SSOP,	TSSOP,	TSSOP-48
针数	48	48	48	48	48	48	48	48	48
制造商包装代码	SOT362-1	SOT362-1	SOT362-1	SOT362-1	SOT370-1	SOT370-1	SOT370-1	SOT362-1	SOT362-1
系列	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 代码	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48
长度	12.5 mm	12.5 mm	12.5 mm	12.5 mm	15.875 mm	15.875 mm	15.875 mm	12.5 mm	12.5 mm
逻辑集成电路类型	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
位数	8	8	8	8	8	8	8	8	8
功能数量	2	2	2	2	2	2	2	2	2
端口数量	2	2	2	2	2	2	2	2	2
端子数量	48	48	48	48	48	48	48	48	48
最高工作温度	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	85 °C	125 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
输出特性	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR
输出极性	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	TSSOP	TSSOP	TSSOP	TSSOP	SSOP	SSOP	SSOP	TSSOP	TSSOP
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	260	NOT SPECIFIED	NOT SPECIFIED	260	260
传播延迟（tpd）	18.5 ns	18.5 ns	18.5 ns	18.5 ns	9 ns	18.5 ns	18.5 ns	6.8 ns	9 ns
座面最大高度	1.2 mm	1.2 mm	1.2 mm	1.2 mm	2.8 mm	2.8 mm	2.8 mm	1.2 mm	1.2 mm
最大供电电压 (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
标称供电电压 (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	2.7 V	1.8 V	1.8 V	2.7 V	2.7 V
表面贴装	YES	YES	YES	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	INDUSTRIAL	AUTOMOTIVE
端子形式	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.635 mm	0.635 mm	0.635 mm	0.5 mm	0.5 mm
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	30	NOT SPECIFIED	NOT SPECIFIED	30	30
宽度	6.1 mm	6.1 mm	6.1 mm	6.1 mm	7.5 mm	7.5 mm	7.5 mm	6.1 mm	6.1 mm
厂商名称	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	-	Nexperia
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	-	compliant
Samacsys Description	74LVC(H)162373A - 16-bit D-type transparent latch@en-us	74LVC(H)162373A - 16-bit D-type transparent latch@en-us	74LVC(H)162373A - 16-bit D-type transparent latch@en-us	74LVC(H)162373A - 16-bit D-type transparent latch@en-us	74LVC(H)162373A - 16-bit D-type transparent latch@en-us	74LVC(H)162373A - 16-bit D-type transparent latch@en-us	74LVC(H)162373A - 16-bit D-type transparent latch@en-us	-	-
Base Number Matches	1	1	-	1	1	1	1	1	1
JESD-609代码	-	-	e4	e4	e4	e4	-	e4	e4
湿度敏感等级	-	-	1	1	1	1	-	1	1
端子面层	-	-	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	-	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD

74LVC162373ADGG,11

74LVC162373ADGG,11概述

74LVC162373ADGG,11规格参数

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