电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

SVF-81T-P2.0

产品描述线规 - AWG:12 镀层厚度:- 线规 - mm²:3.5 产品类型:压线端子 认证:UL , RoHS , CSA , TUV 此物料购买超过100个是每100个一截发货.
产品类别连接器    连接器支架   
文件大小196KB,共4页
制造商JST
标准
下载文档 详细参数 全文预览

SVF-81T-P2.0概述

线规 - AWG:12 镀层厚度:- 线规 - mm²:3.5 产品类型:压线端子 认证:UL , RoHS , CSA , TUV 此物料购买超过100个是每100个一截发货.

SVF-81T-P2.0规格参数

参数名称属性值
是否Rohs认证符合
厂商名称JST
Reach Compliance Codeunknown
ECCN代码EAR99
其他特性CONTACT FINISH: TIN
认证CSA; TUV; UL
组装件名称CONTACT
最大电缆入口数0.161 inch
连接器支架类型CONNECTOR ACCESSORY
触点性别FEMALE
触点电阻10 mΩ
DIN 符合性NO
IEC 符合性NO
MIL 符合性NO
材料PHOSPHOR BRONZE
安装方式STRAIGHT
最高工作温度90 °C
最低工作温度-25 °C
额定电流20 A
额定电压(交流)600 V
额定电压(直流)600 V
端子长度0.287 inch
端子类型CRIMP
用于VL CONNECTOR
最大线径12 AWG

文档预览

下载PDF文档
VL
CONNECTOR
6.2mm pitch/Disconnectable Crimp style Wire-to-wire connectors
(Combined use for both wire-to-board and wire-to-wire connections)
Specifications –––––––––––––––––––
• Current rating: 20 A AC, DC max.
• Voltage rating: 600 V AC, DC max.
• Temperature range: -25˚C to +90˚C
(including temperature rise in applying
electrical current)
• Contact resistance: Initial value/ 7 mΩ max.
After environmental tests/ 10 mΩ max.
• Insulation resistance: 1,000 MΩ min.
• Withstanding voltage: 2,000 VAC/minute
• Applicable wire: AWG #22 to #12
0.3 to 3.5 mm
2
• Applicable panel thickness: 0.5 to 2.0 mm
* Refer to "General Instruction and Notice when using
Terminals and Connectors" at the end of this catalog.
* Contact JST for details.
* Compliant with RoHS.
Note: The current rating varies depending on the number of circuits and the wire
size used in each connector. The table below lists the current rating as a
function of the number of circuits and the wire size.
Current unit: A
This VL connector is designed for wire-to-wire
and wire-to-board 6.2 mm pitch connector
corresponding to large current up to 20 A
(1 or 2-circuit with 3.5 mm
2
wire). Secondary
retainer, which prevents from insufficient
insertion of contact and coming off contact,
may use and large current circuit can be
connected certainly and safety.
• Housing lances for contact retention
• Secondary retainer
• Suited for circuits with high power requirements
• Panel lock construction
Circuits
1
2
3
4
6
8
12
#12
20
20
19
18
16
16
15
#14
15
15
14
13
12
11
10
Wire size (AWG)
#16
#18
10
10
9
9
8
7
7
8
8
8
7
7
6
6
#20
6
6
6
6
5
5
4
#22
4
4
4
4
3
3
3
Standards ––––––––––––––––––––
1
Certified LR20812
2
R9351103
Inner-housing lock
0
Recognized E60389
Panel layout and Assembly layout
<2, 3, 4 circuits (single-row)>
<4, 6, 8, 12 circuits>
19.3
(including retainer)
40.5
44.1 (including retainer)
40.5
44.1 (including retainer)
Inner-housing lock
12.2
40.5
44.1 (including retainer)
Outer-housing lock
14.6
Outer-housing lock
21.7
(including retainer)
40.5
44.1 (including retainer)
Shape
I
9.8
±0.13
Shape
II
9.8
±0.13
Circuits
2
18.6
±0.13
C
D
3
4
4
6
0.5
±0.13
4.2
±0.13
A
B
E
(Single-row)
A
B
8
12
Receptacle
housing
Model No.
VLR-02V
VLR-03V
VLR-04V
VLR-04VN
VLR-06V
VLR-08V
VLR-12V
Panel
hole
shape
1
1
2
1
2
2
2
Panel hole dimensions (mm)
General tolerance
A, B, D:
±0.13
C, E:
±0.1
A
13.8
20.0
13.8
26.2
20.0
26.2
38.9
B
20.6
26.8
20.6
33.0
26.8
33.0
45.4
C
5.7
5.7
7.0
5.7
7.0
7.0
7.0
D
8.5
8.5
15.4
8.5
15.4
15.4
15.4
E
1.4
1.4
4.2
1.4
4.2
4.2
4.2
Applicable
panel
thickness (mm)
12.2
±0.13
C
D
0.5
2.0
Note: 1. Punch holes in the panel according to the figures and table shown above. Burrs must be removed.
2. The strength of the panel must be considered when punching two or more holes.
3. The connector must be inserted from the same side as the hole is punched.
1
E
谁有HOLLIAS LEC G3 的 通信协议啊,给一份,不胜感激
谁有HOLLIAS LEC G3 的 通信协议啊,给一份,不胜感激 ...
yxj2046 嵌入式系统
Quartus II 错误
报错内容:Error: Clock input port inclk of PLL "<name>" must be driven by a non-inverted input pin or another PLL, optionally through a Clock Control block。...
eeleader-mcu FPGA/CPLD
无法向STM32F10x传送数据
我想使用C#编一个向STM32F10x发送程序的小程序,但发现一开头就无法传送第一个包,请各位高手指教waitfor('C');//可以通过 byte byteFile; byteFile = getFileBytes("d:\mlbinV01.bin"); //取得 ......
ldreamy stm32/stm8
TI官方TPS61088-EVM-677评估板欢迎申请
开发板流动站的链接>>>在这里 欢迎借用 312058 下图这块TI官方TPS61088-EVM-677评估板相信大家已经看到@jackfrost 分享的测评文章了,感谢他为大家带来了详细的测评内容 目前,此板已经寄 ......
eric_wang 聊聊、笑笑、闹闹
28377片内flash和ram大小的问题
器件概述里flash是512K或1M,RAM是172K或204K。28377D片上的存储器到底有多大啊? 我现在想用28377做无刷电机驱动器,片内存储器大小够用吗? 第一次用TI的C2000系列,不太熟悉,还望多指教 ......
xiangou123 微控制器 MCU
FPGA学习心得
学习了三个月FPGA,现在觉得很有用,对以后的工作有很大的帮助 ...
肚肚qwe FPGA/CPLD

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 747  2153  1089  2481  1779  2  51  56  36  55 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved