74AHCT595
8-BIT SHIFT REGISTER 8-BIT OUTPUT REGISTER
Description
The 74AHCT595 is an advanced high speed CMOS device that is
designed to be pin compatable with 74LS low power Schottky types.
An eight bit shift register accepts data from the serial input (DS) on
each positive transition of the shift register clock (STCP).
zero and is independent of all clocks.
Data from the input serial shift register is placed in the output register
with a rising pulse on the storages resister clock (SHCP). With the
output enable (OE asserted low the 3-state outputs Q0-Q7 become
active and present.
All registers capture data on rising edge and change output on the
falling edge. If both clocks are connected together, the input shift
register is always one clock cycle ahead of the output register.
When
asserted low, the reset function (MR) sets all shift register values to
Pin Assignments
Features
Supply Voltage Range from 4.5V to 5.5V
Sinks or sources 8mA at V
CC
= 4.5V
CMOS low power consumption
Schmitt Trigger Action at All Inputs
Inputs accept up to 5.5V
ESD Protection Tested per JESD 22
Exceeds 200-V Machine Model (A115-A)
Exceeds 2000-V Human Body Model (A114-A)
Exceeds 1000-V Charged Device Model (C101C)
Applications
General Purpose Logic
Serial to Parallel Data conversion
Capture and hold data for extended periods of time.
Allow simple serial bit streams from a microcontroller to control as
many peripheral lines as needed.
Wide array of products such as:
Computer peripherals
Appliances
Industrial control
Latch-Up Exceeds 250mA per JESD 78, Class II
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
Click here for ordering information, located at the end of datasheet
74AHCT595
Document number: DS35487 Rev. 3 - 2
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74AHCT595
Pin Descriptions
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND
Q7S
MR
SHCP
STCP
OE
DS
Q0
Vcc
Description
Parallel Data Output 1
Parallel Data Output 2
Parallel Data Output 3
Parallel Data Output 4
Parallel Data Output 5
Parallel Data Output 6
Parallel Data Output 7
Ground
Serial Data Output
Master Reset Input
Shift Register Clock Input
Storage Register Clock Input
Output Enable Input
Serial Data Input
Parallel Data Output 0
Supply Voltage
Functional Diagram
Logic Diagram
74AHCT595
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74AHCT595
Functional Description and Timing Diagram
Control
SHCP
X
X
X
STCP
X
X
X
OE
L
L
H
L
MR
L
L
L
H
Input
DS
Q7S
L
L
L
Q6S
Output
Qn
NC
L
Z
NC
Function
Low-level asserted on MR clears shift register.
Storage register is unchanged
Empty shift register transferred to storage register
Shift register remains clear;: All Q ouputs in Z state.
HIGH is shifted into first stage of Shift Register Contents of each
register shifted to next register
The content of Q6S has been shifted to Q7S and now appears on
device pin Q7S
Contents of shift register copied to storage register. With output now
in active state the storage resister contents appear on Q outputs.
Contents of shift register copied to output register then shift register
shifted.
X
L
L
H
H
NC
Q6S
QnS
QnS
H=HIGH voltage state
L=LOW voltage state
=LOW
to HIGH transition
X= don’t care – high or low (not floating)
NC= No change
Z= high-impedance state
74AHCT595
Document number: DS35487 Rev. 3 - 2
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74AHCT595
Absolute Maximum Ratings
(Note 4) (@T
A
= +25°C, unless otherwise specified.)
Symbol
ESD HBM
ESD CDM
ESD MM
V
CC
V
I
V
o
I
IK
I
OK
I
OK
I
O
I
CC
I
GND
T
J
T
STG
P
TOT
Notes:
Description
Human Body Model ESD Protection
Charged Device Model ESD Protection
Machine Model ESD Protection
Supply Voltage Range
Input Voltage Range
Voltage applied to output in high or low state
Input Clamp Current
Output Clamp Current
Output Clamp Current
V
I
< -0.5V
V
O
<-0.5V
V
O
> V
CC
+0.5V
Rating
2
1
200
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+0.5
-20
-20
20
±25
75
-75
-40 to +150
-65 to +150
500
Unit
kV
kV
V
V
V
V
mA
mA
mA
mA
mA
mA
°C
°C
mW
Continuous output current
Continuous current through Vcc or GND
Continuous current through Vcc or GND
Operating Junction Temperature
Storage Temperature
Total Power Dissipation
4. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device
operation should be within recommend values.
Recommended Operating Conditions
(Note 5) (@T
A
= +25°C, unless otherwise specified.)
Symbol
V
CC
V
I
V
O
Δt/ΔV
T
A
Note:
Parameter
Supply Voltage
Input Voltage
Output Voltage
Input transition rise or fall rate
Operating free-air temperature
Active Mode
Conditions
Min
4.5
0
0
-40
Max
5.5
5.5
V
CC
20
+125
Unit
V
V
V
ns/V
°C
V
CC
= 4.5V to 5.5V
5. Unused inputs should be held at V
CC
or Ground.
Electrical Characteristics
(@T
A
= +25°C, unless otherwise specified.)
Symbol
V
IH
V
IL
V
OH
V
OL
I
I
I
OZ
I
CC
∆I
CC
C
i
Parameter
High-Level
Input Voltage
Low-Level
Input voltage
High-Level
Output Voltage
Low-Level
Output Voltage
Input Current
I
OH
= -50μA
I
OH
= -8mA
I
OL
= 50μA
I
OL
= 8mA
V
I
=GND to
5.5V
Test Conditions
V
CC
4.5V to 5.5V
4.5V to 5.5V
4.5V
4.5V
0 to 5.5V
5.5V
5.5V
4.5V to 5.5V
5.5V
T
A
= +25°C
Min
Typ Max
2.0
4.4
3.94
4.5
0
0.1
4
0.8
0.1
0.36
±1
± 0.25
4.0
1.35
10
T
A
= -40°C to +85°C
Min
Max
2.0
4.4
3.80
0.8
0.1
0.44
±1
2.5
40
1.5
10
T
A
= -40° C to +125°C
Min
Max
2.0
4.4
3.70
0.8
0.1
0.55
±2
10
80
1.5
10
Unit
V
V
V
V
μA
μA
μA
mA
pF
Z-state Leakage V
O
= Vcc or GND
Current
OE
= HIGH
Supply Current
Additional
Supply Current
per Input
Input
Capacitance
V
I
= GND or V
CC
I
O
= 0
V
I
= Vcc -2.1V
I
O
= 0
V
i
= V
CC
or GND
74AHCT595
Document number: DS35487 Rev. 3 - 2
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74AHCT595
Switching Characteristics
Symbol /
Parameter
f
MAX
Maximum
Frequency
Pins
Test Conditions
V
CC
T
A
= +25°C
Min
Typ
Max
130
5.0
5.0
5.0
3.0
5.0
2.0
170
-40°C to +85°C
Min
110
5.0
5.0
5.0
3.0
5.0
2.0
Max
-40°C to +125°C
Min
90
5.0
5.0
5.0
3.0
5.0
2.0
Max
ns
ns
ns
ns
Unit
SHCP or STCP
SHCP
HIGH or LOW
STCP
HIGH or LOW
MR LOW
DS to SHCP
SHCP to STCP
DS to SHCP
Figure 1
Figure 1
Figure 1
Figure 1
Figure 1
Figure 1
Figure 1
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
MHz
t
W
Pulse Width
t
SU
Set-up Time
t
H
Hold Time
t
REC
Recovery Time MR to SHCP
Figure 1
Figure 1
C
L
= 15pF
Figure 1
C
L
= 50pF
Figure 1
C
L
= 15pF
Figure 1
C
L
= 50pF
Figure 1
C
L
= 15pF
Figure 1
C
L
= 50pF
Figure 1
C
L
= 15pF
Figure 1
C
L
= 50pF
Figure 1
C
L
= 15pF
Figure 1
C
L
= 50pF
4.5V to 5.5V
3.0
3.0
3.0
ns
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
3.8
5.2
4
5.3
4.6
5.8
4.8
6.2
3.6
5.8
8.2
10
7.4
9
8.2
10.5
9
11.6
6.9
10.3
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
9
11
8.5
10.5
9.5
11.5
11
13
8
11
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
10
ns
12
9.5
ns
11.5
10.5
ns
12.5
12
ns
14.5
9
ns
12
SHCP to Q7S
t
PD
Propagation
Delay
STCP to Qn
MR to Q7S
t
EN
Enable Time
OE to Qn
t
DIS
Disable Time
OE to Qn
Operating Characteristics
(@T
A
= +25°C, unless otherwise specified.)
Parameter
C
pd
Power dissipation
capacitance
Test
Conditions
f = 1 MHz all outputs switching-no load
V
CC
= 5V
Typ
42
Unit
pF
74AHCT595
Document number: DS35487 Rev. 3 - 2
5 of 10
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June 2013
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