The A3988 is a quad DMOS full-bridge driver capable of driving
up to two stepper motors or four DC motors. Each full-bridge
output is rated up to 1.2 A and 36 V. The A3988 includes fixed
off-time pulse width modulation (PWM) current regulators,
along with 2- bit nonlinear DACs (digital-to-analog converters)
that allow stepper motors to be controlled in full, half, and
quarter steps, and DC motors in forward, reverse, and coast
modes. The PWM current regulator uses the Allegro
™
patented
mixed decay mode for reduced audible motor noise, increased
step accuracy, and reduced power dissipation.
Internal synchronous rectification control circuitry is provided
to improve power dissipation during PWM operation.
Protection features include thermal shutdown with hysteresis,
undervoltage lockout (UVLO) and crossover current protection.
Special power up sequencing is not required.
The A3988 is supplied in two packages, EV and JP, with exposed
power tabs for enhanced thermal performance. The EV is a
6 mm x 6 mm, 36 pin QFN package with a nominal overall
package height of 0.90 mm. The JP is a 7 mm × 7 mm 48 pin
LQFP. Both packages are lead (Pb) free, with 100% matte tin
leadframe plating.
DESCRIPTION
Packages
Package EV, 36 pin QFN
0.90 mm nominal height
with exposed thermal pad
Approximate scale
Package JP, 48 pin LQFP
with exposed thermal pad
0.1 µF
50 V
VCP
CP1
CP2
0.1 µF
50 V
VBB1
VBB2
100 µF
50 V
OUT1A
OUT1B
V
MOTOR
32 V
0.22 µF
50 V
PHASE1
I01
I11
PHASE2
Microprocessor
I02
I12
PHASE3
I03
I13
PHASE4
I04
I14
VREF1
V
REF
VREF2
VREF3
VREF4
V
DD
3.3 V
VDD
A3988
OUT2A
OUT2B
OUT3A
OUT3B
OUT4A
OUT4B
SENSE2
SENSE1
SENSE3
SENSE4
R
S2
R
S1
R
S3
R
S4
Bipolar Stepper Motors
Typical Application Circuit
A3988DS, Rev. 10
A3988
Selection Guide
Part Number
A3988SEV-T
A3988SEVTR-T
A3988SJPTR-T
Quad DMOS Full Bridge PWM Motor Driver
Package
36 pin QFN with exposed thermal pad
36 pin QFN with exposed thermal pad
48 pin LQFP with exposed thermal pad
Packing
61 pieces per tube
1500 pieces per reel
1500 pieces per reel
SPECIFICATIONS
Absolute Maximum Ratings
Characteristic
Load Supply Voltage
Logic Supply Voltage
Output Current
Symbol
V
BB
Pulsed t
w
< 1 µs
V
DD
I
OUT
May be limited by duty cycle, ambient temperature, and heat sinking. Under
any set of conditions, do not exceed the specified current rating or a Junction
Temperature of 150°C.
Pulsed t
w
< 1 µs
Logic Input Voltage Range
SENSEx Pin Voltage
VREFx Pin Voltage
Operating Temperature Range
Junction Temperature
Storage Temperature Range
V
IN
V
SENSEx
Pulsed t
w
< 1 µs
V
REFx
T
A
T
J
(max)
T
stg
Range S
Notes
Rating
-0.5 to 36
38
–0.4 to 7
1.2
Units
V
V
V
A
2.8
–0.3 to 7
0.5
2.5
2.5
–20 to 85
150
–40 to 125
A
V
V
V
V
ºC
ºC
ºC
Thermal Characteristics (may require derating at maximum conditions)
Characteristic
Package Thermal Resistance
Symbol
R
θJA
Test Conditions
EV package, 4 layer PCB based on JEDEC standard
JP package, 4 layer PCB based on JEDEC standard
Min.
27
23
Units
ºC/W
ºC/W
Power Dissipation versus Ambient Temperature
5500
5000
4500
4000
JP Package
4-layer PCB
(R
θJA
= 23 ºC/W)
Power Dissipation, P
D
(mW)
3500
3000
2500
2000
1500
1000
500
0
25
50
75
100
125
Temperature (°C)
150
175
EV Package
4-layer PCB
(R
θJA
= 27 ºC/W)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A3988
Quad DMOS Full Bridge PWM Motor Driver
0.1 µF
50 V
0.1 µF
50 V
100 µF
50 V
0.22 µF
50 V
VBB1
VCP
CP1
CP2
VDD
DMOS
FULL-BRIDGE 1
V
CP
VBB1
OSC
CHARGE PUMP
OUT1A
PHASE1
I01
I11
PHASE2
I02
I12
GATE
DRIVE
VBB1
DMOS
FULL-BRIDGE 2
Control Logic
Bridges 1 and 2
OUT1B
SENSE1
Sense1
VREF1
3
-
+
PWM Latch
BLANKING
OUT2A
+
VREF2
3
Sense2
PWM Latch
BLANKING
OUT2B
-
PHASE3
I03
I13
PHASE4
I04
I14
GATE
DRIVE
Sense3
VBB2
PWM Latch
BLANKING
SENSE3
Control Logic
Bridges 3 and 4
V
CP
Sense2
SENSE2
VBB2
DMOS
FULL-BRIDGE 3
OUT3A
OUT3B
+
VREF3
3
-
Sense3
DMOS
FULL-BRIDGE 4
VREF4
3
Sense4
OUT4A
OUT4B
GND
Functional Block Diagram
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
GND
+
PWM Latch
BLANKING
Sense4
SENSE4
-
3
A3988
Quad DMOS Full Bridge PWM Motor Driver
33 SENSE3
28 SENSE4
34 OUT3A
32 OUT3B
29 OUT4B
27 OUT4A
31 VBB2
36 NC
35 NC
30 NC
26 NC
25 NC
Pin-out Diagrams and Terminal List Table
25 SENSE3
21 SENSE4
I13 37
20 OUT4A
24
23
22
21
20
PAD
19
18
17
16
15
14
13
I14
NC
PHASE1
PHASE2
GND
VREF4
VREF3
VREF2
VREF1
VDD
PHASE3
PHASE4
24 OUT3B
22 OUT4B
26 OUT3A
23 VBB2
I12 38
19 I14
27 I13
I11 39
GND 40
18
17
16
15
14
13
12
11
10
PHASE1
PHASE2
GND
VREF4
VREF3
VREF2
VREF1
VDD
PHASE3
I12 28
I11 29
GND 30
VCP 31
CP1 32
CP2 33
I01 34
I02 35
I03 36
1
2
3
4
5
6
7
8
9
PAD
NC 41
VCP 42
CP1 43
CP2 44
I01 45
I02 46
I03 47
I04 48
OUT2A 10
OUT1A
OUT1B
SENSE1
OUT2B
SENSE2
OUT2A
VBB1
PHASE4
OUT1A
SENSE1
VBB1
Package EV, 36-Pin QFN Pin-out
Terminal List Table
EV
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
1
–
Number
JP
3
4
5
6
8
9
10
13
14
15
16
17
18
19
20
21
22
24
27
28
29
31
32
33
34
37
38
39
40
42
43
44
45
46
47
48
1, 2, 7, 11,
12, 23, 25,
26, 30, 35,
36, 41
–
Pin Name
OUT1A
SENSE1
OUT1B
VBB1
1
OUT2B
SENSE2
OUT2A
PHASE4
PHASE3
VDD
VREF1
VREF2
VREF3
VREF4
GND
PHASE2
PHASE1
I14
OUT4A
SENSE4
OUT4B
VBB2
1
OUT3B
SENSE3
OUT3A
I13
I12
I11
GND
VCP
CP1
CP2
I01
I02
I03
I04
NC
Package JP, 48-Pin LQFP Pin-out
Pin Description
DMOS Full-Bridge 1 Output A
Sense Resistor Terminal for Bridge 1
DMOS Full-Bridge 1 Output B
Load Supply Voltage
DMOS Full-Bridge 2 Output B
Sense Resistor Terminal for Bridge 2
DMOS Full-Bridge 2 Output A
Control Input
Control Input
Logic Supply Voltage
Analog Input
Analog Input
Analog Input
Analog Input
Ground
Control Input
Control Input
Control Input
DMOS Full-Bridge 4 Output A
Sense Resistor Terminal for Bridge 4
DMOS Full-Bridge 4 Output B
Load Supply Voltage
DMOS Full-Bridge 3 Output B
Sense Resistor Terminal for Bridge 3
DMOS Full-Bridge 3 Output A
Control Input
Control Input
Control Input
Ground
Reservoir Capacitor Terminal
Charge Pump Capacitor Terminal
Charge Pump Capacitor Terminal
Control Input
Control Input
Control Input
Control Input
No Connect
Exposed pad for enhanced thermal
performance. Should be soldered to the
PCB.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
–
1
VBB1
PAD
and VBB2 need to be connected together close to the A3988
SENSE2
OUT1B
OUT2B
NC 12
NC 11
I04
NC
NC
NC
Packages are not to scale
1
2
3
4
5
6
7
8
9
4
A3988
Quad DMOS Full Bridge PWM Motor Driver
ELECTRICAL CHARACTERISTICS
1
: valid at T
A
= 25°C, V
BB
= 36 V, unless otherwise noted
Characteristics
Load Supply Voltage Range
Logic Supply Voltage Range
VDD Supply Current
Output On Resistance
V
f
, Outputs
Output Leakage
VBB Supply Current
Control Logic
Logic Input Voltage
Logic Input Current
Input Hysteresis
V
IN(1)
V
IN(0)
I
IN
V
hys
PWM change to source on
Propagation Delay Times
t
pd
t
COD
t
BLANK
V
REFx
I
REF
V
ERR
Operating
V
REF
= 1.5
V
REF
= 1.5, phase current = 100%
Current Trip-Level Error
3
Protection Circuits
VBB UVLO Threshold
VBB Hysteresis
VDD UVLO Threshold
VDD Hysteresis
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
1
For
2
Typical
Symbol
V
BB
V
DD
I
DD
R
DS(on)
I
DSS
I
BB
Operating
Operating
Test Conditions
Min.
8.0
3.0
–
–
–
–
–20
–
0.7×V
DD
–
Typ.
2
–
–
7
700
700
–
–
–
–
–
<1.0
300
550
–
550
–
425
1
–
–
–
–
–
7.6
500
2.8
105
165
15
Max.
36
5.5
10
800
800
1.3
20
8
–
0.3×V
DD
20
500
1000
300
1000
250
1000
1.3
1.5
±1
5
5
15
7.9
600
2.95
125
175
–
Units
V
V
mA
mΩ
mΩ
V
µA
mA
V
V
µA
mV
ns
ns
ns
ns
ns
µs
V
μA
%
%
%
V
mV
V
mV
°C
°C
Source driver, I
OUT
= –1.2 A, TJ = 25°C
Sink driver, I
OUT
= 1.2 A, TJ = 25°C
I
OUT
= 1.2 A
Outputs, V
OUT
= 0 to V
BB
I
OUT
= 0 mA, outputs on, PWM = 50 kHz,
DC = 50%
V
IN
= 0 to 5 V
–20
150
350
35
350
35
300
0.7
0.0
–
–5
–5
–15
7.3
400
2.65
75
155
–
PWM change to source off
PWM change to sink on
PWM change to sink off
Crossover Delay
Blank Time
VREFx Pin Input Voltage Range
VREFx Pin Reference Input Current
V
REF
= 1.5, phase current = 67%
V
REF
= 1.5, phase current = 33%
V
UV(VBB)
V
UV(VBB)hys
V
UV(VDD)
V
UV(VDD)hys
T
JTSD
T
JTSDhys
V
BB
rising
V
DD
rising
input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for individual units, within the
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