a
FEATURES
Superior Upgrade for MAX690–MAX695
Specified Over Temperature
Low Power Consumption (5 mW)
Precision Voltage Monitor
Reset Assertion Down to 1 V V
CC
Low Switch On-Resistance 1.5 Normal,
20 in Backup
High Current Drive (100 mA)
Watchdog Timer—100 ms, 1.6 s, or Adjustable
600 nA Standby Current
Automatic Battery Backup Power Switching
Extremely Fast Gating of Chip Enable Signals (5 ns)
Voltage Monitor for Power Fail
APPLICATIONS
Microprocessor Systems
Computers
Controllers
Intelligent Instruments
Automotive Systems
GENERAL DESCRIPTION
V
BATT
V
BATT
V
CC
Microprocessor
Supervisory Circuits
ADM690–ADM695
FUNCTIONAL BLOCK DIAGRAMS
V
OUT
4.65V
1
RESET
GENERATOR
2
RESET
WATCHDOG
INPUT (WDI)
POWER FAIL
INPUT (PFI)
WATCHDOG
TRANSITION DETECTOR
(1.6s)
ADM690
ADM692
ADM694
POWER FAIL
OUTPUT (PFO)
1.3V
1
VOLTAGE
2
RESET
DETECTOR = 4.65V (ADM690, ADM694)
4.40V (ADM692)
PULSE WIDTH = 50ms (ADM690, ADM692)
200ms (ADM694)
BATT ON
The ADM690–ADM695 family of supervisory circuits offers
complete single chip solutions for power supply monitoring and
battery control functions in microprocessor systems. These
functions include
µP
reset, backup battery switchover, watchdog
timer, CMOS RAM write protection, and power failure warn-
ing. The complete family provides a variety of configurations to
satisfy most microprocessor system requirements.
The ADM690, ADM692 and ADM694 are available in 8-pin
DIP packages and provide:
1. Power-on reset output during power-up, power-down and
brownout conditions. The
RESET
output remains opera-
tional with V
CC
as low as 1 V.
2. Battery backup switching for CMOS RAM, CMOS
microprocessor or other low power logic.
3. A reset pulse if the optional watchdog timer has not been
toggled within a specified time.
4. A 1.3 V threshold detector for power fail warning, low battery
detection, or to monitor a power supply other than +5 V.
The ADM691, ADM693 and ADM695 are available in 16-pin
DIP and small outline packages and provide three additional
functions.
1. Write protection of CMOS RAM or EEPROM.
2. Adjustable reset and watchdog timeout periods.
3. Separate watchdog timeout, backup battery switchover, and
low V
CC
status outputs.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
V
OUT
V
CC
CE
IN
ADM691
ADM693
ADM695
CE
OUT
4.65V
1
LOW LINE
RESET
OSC IN
OSC SEL
RESET &
WATCHDOG
TIMEBASE
RESET
GENERATOR
RESET
WATCHDOG
INPUT (WDI)
POWER FAIL
INPUT (PFI)
WATCHDOG
TRANSITION DETECTOR
WATCHDOG
TIMER
WATCHDOG
OUTPUT (WDO)
POWER FAIL
OUTPUT (PFO)
1.3V
1
VOLTAGE
DETECTOR = 4.65V (ADM691, ADM695)
4.40V (ADM693)
The ADM690–ADM695 family is fabricated using an advanced
epitaxial CMOS process combining low power consumption
(5 mW), extremely fast Chip Enable gating (5 ns) and high reli-
ability.
RESET
assertion is guaranteed with V
CC
as low as 1 V.
In addition, the power switching circuitry is designed for mini-
mal voltage drop thereby permitting increased output current
drive of up to 100 mA without the need for an external pass
transistor.
© Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
ADM690–ADM695–SPECIFICATIONS
Parameter
BATTERY BACKUP SWITCHING
V
CC
Operating Voltage Range
ADM690, ADM691, ADM694, ADM695
ADM692, ADM693
V
BATT
Operating Voltage Range
ADM690, ADM691, ADM694, ADM695
ADM692, ADM693
V
OUT
Output Voltage
V
OUT
in Battery Backup Mode
Supply Current (Excludes I
OUT
)
Supply Current in Battery Backup Mode
Battery Standby Current
(+ = Discharge, – = Charge)
Battery Switchover Threshold
V
CC
– V
BATT
Battery Switchover Hysteresis
BATT ON Output Voltage
BATT ON Output Short Circuit Current
0.5
RESET AND WATCHDOG TIMER
Reset Voltage Threshold
ADM690, ADM691, ADM694, ADM695
ADM692, ADM693
Reset Threshold Hysteresis
Reset Timeout Delay
ADM690, ADM691, ADM692, ADM693
ADM694, ADM695
Watchdog Timeout Period, Internal Oscillator
Watchdog Timeout Period, External Clock
Minimum WDI Input Pulse Width
RESET
Output Voltage @ V
CC
= +1 V
RESET, LOW LINE
Output Voltage
RESET, WDO
Output Voltage
Output Short Circuit Source Current
Output Short Circuit Sink Current
WDI Input Threshold
Logic Low
Logic High
WDI Input Current
POWER FAIL DETECTOR
PFI Input Threshold
PFI Input Current
PFO
Output Voltage
PFO
Short Circuit Source Current
PFO
Short Circuit Sink Current
CHIP ENABLE GATING
CE
IN
Threshold
3.0
CE
IN
Pull-Up Current
CE
OUT
Output Voltage
V
OUT
– 1.5
V
OUT
– 0.05
CE
Propagation Delay
5
3
3.5
1
3
25
Min
Typ
4.75
4.5
2.0
2.0
V
CC
– 0.05 V
CC
– 0.025
V
CC
– 0.5
V
CC
– 0.25
V
BATT
– 0.05 V
BATT
– 0.02
1
0.6
–0.1
–1.0
70
50
20
(V
CC
= Full Operating Range, V
BATT
= +2.8 V, T
A
= T
MIN
to
T
MAX
unless otherwise noted)
Max
Units
Test Conditions/Comments
5.5
5.5
4.25
4.0
V
V
V
V
V
V
V
mA
µA
µA
µA
mV
mV
mV
V
mA
µA
1.95
1
+0.02
+0.02
I
OUT
= 1 mA
I
OUT
≤
100 mA
I
OUT
= 250
µA,
V
CC
< V
BATT
– 0.2 V
I
OUT
= 100 mA
V
CC
= 0 V, V
BATT
= 2.8 V
5.5 V > V
CC
> V
BATT
+ 0.2 V
T
A
= +25°C
Power Up
Power Down
I
SINK
= 3.2 mA
BATT ON = V
OUT
= 4.5 V Sink Current
BATT ON = 0 V Source Current
0.3
35
1
25
4.5
4.25
4.65
4.4
40
50
200
1.6
100
4.73
4.48
V
V
mV
ms
ms
s
ms
Cycles
Cycles
ns
mV
V
V
V
V
µA
mA
V
V
µA
µA
V
nA
V
V
µA
mA
V
V
µA
V
V
V
ns
OSC SEL = HIGH, V
CC
= 5 V, T
A
= +25°C
OSC SEL = HIGH, V
CC
= 5 V, T
A
= +25°C
Long Period, V
CC
= 5 V, T
A
= +25°C
Short Period, V
CC
= 5 V, T
A
= +25°C
Long Period
Short Period
V
IL
= 0.4, V
IH
= 3.5 V
I
SINK
= 10
µA,
V
CC
= 1 V
I
SINK
= 1.6 mA, V
CC
= 4.25 V
I
SOURCE
= 1
µA,
V
CC
= 5 V
I
SINK
= 1.6 mA, V
CC
= 5 V
I
SOURCE
= 1
µA,
V
CC
= 4.25 V
35
140
1.0
70
3840
768
50
70
280
2.25
140
4097
1025
200
0.4
0.4
25
4
3.5
V
CC
= 5 V
1
0.8
3.5
–50
1.25
–25
3.5
1
20
–15
1.3
±
0.01
50
WDI = V
OUT
, T
A
= +25°C
WDI = 0 V, T
A
= +25°C
V
CC
= +5 V
I
SINK
= 3.2 mA
I
SOURCE
= 1
µA
PFI = Low,
PFO
= 0 V
PFI = High,
PFO
= V
OUT
V
IL
V
IH
I
SINK
= 3.2 mA
I
SOURCE
= 3.0 mA
I
SOURCE
= 1
µA,
V
CC
= 0 V
1.35
+25
0.4
25
3
25
0.8
0.4
9
–2–
REV. A
ADM690–ADM695
Parameter
OSCILLATOR
OSC IN Input Current
OSC SEL Input Pull-Up Current
OSC IN Frequency Range
OSC IN Frequency with External Capacitor
Min
Typ
±
2
5
0
4
250
Max
Units
µA
µA
kHz
kHz
Test Conditions/Comments
OSC SEL = 0 V
OSC SEL = 0 V, C
OSC
= 47 pF
NOTE
1
WDI is a three level input which is internally biased to 38% of V
CC
and has an input impedance of approximately 125 kΩ.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25°C unless otherwise noted)
ORDERING GUIDE
Model
Temperature Range
Package Option
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
V
BATT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
All Other Inputs . . . . . . . . . . . . . . . . . . –0.3 V to V
OUT
+ 0.5 V
Input Current
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
V
BATT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Power Dissipation, N-8 DIP . . . . . . . . . . . . . . . . . . . . 400 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 120°C/W
Power Dissipation, Q-8 DIP . . . . . . . . . . . . . . . . . . . . 500 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 125°C/W
Power Dissipation, N-16 DIP . . . . . . . . . . . . . . . . . . . 600 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 135°C/W
Power Dissipation, Q-16 DIP . . . . . . . . . . . . . . . . . . . 600 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 100°C/W
Power Dissipation, R-16 SOIC . . . . . . . . . . . . . . . . . . 600 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 110°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (S Version) . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300°C
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum ratings for extended periods of time may affect device reliability.
ADM690AN
ADM690AQ
ADM690SQ
ADM691AN
ADM691AR
ADM691AQ
ADM691SQ
ADM692AN
ADM692AQ
ADM692SQ
ADM693AN
ADM693AR
ADM693AQ
ADM693SQ
ADM694AN
ADM694AQ
ADM694SQ
ADM695AN
ADM695AR
ADM695AQ
ADM695SQ
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
N-8
Q-8
Q-8
N-16
R-16
Q-16
Q-16
N-8
Q-8
Q-8
N-16
R-16
Q-16
Q-16
N-8
Q-8
Q-8
N-16
R-16
Q-16
Q-16
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADM690–ADM695 features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–3–
ADM690–ADM695
PIN FUNCTION DESCRIPTION
Mnemonic
Function
V
CC
V
BATT
V
OUT
GND
RESET
Power Supply Input: +5 V Nominal.
Backup Battery Input. Connect to Ground if a backup battery is not used.
Output Voltage, V
CC
or V
BATT
is internally switched to V
OUT
depending on which is at the highest potential. V
OUT
can supply up to 100 mA to power CMOS RAM. Connect V
OUT
to V
CC
if V
OUT
and V
BATT
are not used.
0 V. Ground reference for all signals.
Logic Output.
RESET
goes low if
1. V
CC
falls below the Reset Threshold
2. V
CC
falls below V
BATT
3. The watchdog timer is not serviced within its timeout period.
The reset threshold is typically 4.65 V for the ADM690/ADM691/ADM694/ADM695 and 4.4 V for the ADM692 and
ADM693.
RESET
remains low for 50 ms (ADM690/ADM691/ADM692/ADM693) or 200 ms (ADM694/ADM695)
after V
CC
returns above the threshold.
RESET
also goes low for 50 (200) ms if the watchdog timer is enabled but not
serviced within its timeout period. The
RESET
pulse width can be adjusted on the ADM691/ADM693/ADM695 as
shown in Table I. The
RESET
output has an internal 3
µA
pull up, and can either connect to an open collector
Reset bus or directly drive a CMOS gate without an external pull-up resistor.
WDI
Watchdog Input. WDI is a three level input. If WDI remains either high or low for longer than the watchdog timeout
period,
RESET
pulses low and WDO goes low. The timer resets with each transition on the WDI line. The watchdog
timer may be disabled if WDI is left floating or is driven to midsupply.
Power Fail Input. PFI is the noninverting input to the Power Fail Comparator when PFI is less than 1.3 V,
PFO
goes low. Connect PFI to GND or V
OUT
when not used.
Power Fail Output.
PFO
is the output of the Power Fail Comparator. It goes low when PFI is less than 1.3 V. The
comparator is turned off and
PFO
goes low when V
CC
is below V
BATT
.
Logic Input. The input to the
CE
gating circuit. Connect to GND or V
OUT
if not used.
Logic Output.
CE
OUT
is a gated version of the
CE
IN
signal.
CE
OUT
tracks
CE
IN
when V
CC
is above the reset
threshold. If V
CC
is below the reset threshold,
CE
OUT
is forced high. See Figures 5 and 6.
Logic Output. BATT ON goes high when V
OUT
is internally switched to the V
BATT
input. It goes low when V
OUT
is internally switched to V
CC
. The output typically sinks 35 mA and can directly drive the base of an external
PNP transistor to increase the output current above the 100 mA rating of V
OUT
.
Logic Output.
LOW LINE
goes low when V
CC
falls below the reset threshold. It returns high as soon as V
CC
rises
above the reset threshold.
Logic Output. RESET is an active high output. It is the inverse of
RESET.
Logic Oscillator Select Input. When OSC SEL is unconnected (floating) or driven high, the internal oscillator sets
the reset active time and watchdog timeout period. When OSC SEL is low, the external oscillator input, OSC IN,
is enabled. OSC SEL has a 3
µA
internal pull up, (see Table I).
Oscillator Logic Input. With OSC SEL low, OSC IN can be driven by an external clock signal or an external
capacitor can be connected between OSC IN and GND. This sets both the reset active pulse timing and the watch-
dog timeout period (see Table I and Figure 4). With OSC SEL high or floating, the internal oscillator is enabled
and the reset active time is fixed at 50 ms typ. (ADM691/ADM693) or 200 ms typ (ADM695). In this mode the
OSC IN pin selects between fast (100 ms) and slow (1.6 s) watchdog timeout periods. In both modes, the timeout
period immediately after a reset is 1.6 s typical.
Logic Output. The Watchdog Output,
WDO,
goes low if WDI remains either high or low for longer than the
watchdog timeout period.
WDO
is set high by the next transition at WDI. If WDI is unconnected or at midsupply,
the watchdog timer is disabled and
WDO
remains high.
WDO
also goes high when
LOW LINE
goes low.
PFI
PFO
CE
IN
CE
OUT
BATT ON
LOW LINE
RESET
OSC SEL
OSC IN
WDO
–4–
REV. A
ADM690–ADM695
PIN CONFIGURATIONS
V
BATT
1
V
OUT
2
V
CC
16 RESET
3
4
GND
ADM691
ADM693
ADM695
TOP VIEW
(Not to Scale)
15 RESET
14 WDO
13 CE
12
IN
OUT
V
OUT
V
CC
1
2
3
4
BATT ON 5
LOW LINE 6
OSC IN
7
CE
ADM690
ADM692
ADM694
TOP VIEW
(Not to Scale)
8
7
6
5
V
BATT
RESET
WDI
PFO
GND
PFI
11 WDI
10
9
PFO
PFI
OSC SEL 8
PRODUCT SELECTION GUIDE
Part
Number
Nominal Reset
Time
Nominal V
CC
Reset Threshold
Nominal Watchdog
Timeout Period
Battery Backup
Switching
Base Drive
Ext PNP
Chip Enable
Signals
ADM690
ADM691
ADM692
ADM693
ADM694
ADM695
50 ms
50 ms or ADJ
50 ms
50 ms or ADJ
200 ms
200 ms or ADJ
4.65 V
4.65 V
4.4 V
4.4 V
4.65 V
4.65 V
1.6 s
100 ms, 1.6 s, ADJ
1.6 s
100 ms, 1.6 s, ADJ
1.6 s
100 ms, 1.6 s, ADJ
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
CIRCUIT INFORMATION
Battery Switchover Section
The battery switchover circuit compares V
CC
to the V
BATT
input, and connects V
OUT
to whichever is higher. Switchover
occurs when V
CC
is 50 mV higher than V
BATT
as V
CC
falls, and
when V
CC
is 70 mV greater than V
BATT
as V
CC
rises. This
20 mV of hysteresis prevents repeated rapid switching if V
CC
falls very slowly or remains nearly equal to the battery voltage.
If the continuous output current requirement at V
OUT
exceeds
100 mA or if a lower V
CC
–V
OUT
voltage differential is desired,
an external PNP pass transistor may be connected in parallel
with the internal transistor. The BATT ON output (ADM691/
ADM693/ADM695) can directly drive the base of the external
transistor.
A 20
Ω
MOSFET switch connects the V
BATT
input to V
OUT
during battery backup. This MOSFET has very low input-to-
output differential (dropout voltage) at the low current levels
required for battery back up of CMOS RAM or other low
power CMOS circuitry. The supply current in battery back up
is typically 0.6
µA.
The ADM690/ADM691/ADM694/ADM695 operates with
battery voltages from 2.0 V to 4.25 V and the ADM692/ADM693
operates with battery voltages from 2.0 V to 4.0 V. High value
capacitors, either standard electrolytic or the farad size double
layer capacitors, can also be used for short-term memory back
up. A small charging current of typically 10 nA (0.1
µA
max)
flows out of the V
BATT
terminal. This current is useful for
maintaining rechargeable batteries in a fully charged condition.
This extends the life of the back up battery by compensating
for its self discharge current. Also note that this current poses
no problem when lithium batteries are used for back up since
the maximum charging current (0.1
µA)
is safe for even the
smallest lithium cells.
If the battery-switchover section is not used, V
BATT
should be
connected to GND and V
OUT
should be connected to V
CC
.
Figure 1. Battery Switchover Schematic
During normal operation with V
CC
higher than V
BATT
, V
CC
is in-
ternally switched to V
OUT
via an internal PMOS transistor
switch. This switch has a typical on-resistance of 1.5
Ω
and can
supply up to 100 mA at the V
OUT
terminal. V
OUT
is normally
used to drive a RAM memory bank which may require instanta-
neous currents of greater than 100 mA. If this is the case then a
bypass capacitor should be connected to V
OUT
. The capacitor
will provide the peak current transients to the RAM. A capaci-
tance value of 0.1
µF
or greater may be used.
REV. A
–5–
模拟与混合信号
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
